From patchwork Wed May 9 12:47:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Krawczyk X-Patchwork-Id: 39588 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B47851B658; Wed, 9 May 2018 14:47:41 +0200 (CEST) Received: from mail-lf0-f66.google.com (mail-lf0-f66.google.com [209.85.215.66]) by dpdk.org (Postfix) with ESMTP id 3CA531B41A for ; Wed, 9 May 2018 14:47:30 +0200 (CEST) Received: by mail-lf0-f66.google.com with SMTP id t129-v6so11469875lff.3 for ; Wed, 09 May 2018 05:47:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=E03mXB4GkSpJ+W0JIhpXTXcg+/xMeSa5aB2hHusHk8Y=; b=lGRBoDRxTwaevq1oTK2OlgijTMnt53eyMymKRcL2d7qKDQXeUW+85FeNdAgu33M2jM 4ho3XZ6BFj4J90bWrLOBku5oQI27gLd0vTn1tZAFe3Zid+qu3S38FvYusqMRSjyYxFVG +upLiLRex0kwGYZluD1I3glLew2h7XuENQoXgGaeh3VaZOBX3JPlX/dL6/nW/RXU9V/2 7vhpFBU4868TP31K5FNEqJlyuHVMxAa2iwKfQ9b2ghrwnPEolSIZMbmUcgqpaHqb6Ely ZE4zQpxYR/+MFUxqV57HiPGCmwZoclLDWRYnbYsICCu0OUGVLUN4JDg8g+sLgvzi41fF gQDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=E03mXB4GkSpJ+W0JIhpXTXcg+/xMeSa5aB2hHusHk8Y=; b=ZdSuFOkfkWQr+Nf4Ma0dv7qO4amvFzuLe5Mg4nmb2+RMzPQxa4m086WXCZLoO5SvyG /Ktg6skeR9ky4DCUStnJTSKG8kFUMDWRZCQQ9kjrGXyDMaR8wPSF3X/v4gRl+XOG0MIc 4X3xUSiNEA/8qy3Y5eTU99ysFL76qQ/ymdAgq2dQbJLJxDO6ZturkiWL6xbNjiTPa6My clRpE0VOQ/Dgp37VSi7ZjNegkgv93Y1dreMC1dBLgboa0hd3gus3G+0dwD4o4BY6/nTz 7byzQ0SNGCRk0zzGGTu+5673Rv037SD3/+SMJmYr1CRyLEfuKZnOCnXePjknlxLVQS8o JNBQ== X-Gm-Message-State: ALQs6tCv/TjkBsvUs3oPqL595WwO9/SpqyZwKI7UvjDtqyBlO4GxfL1G kGtGqMOOe11eGFgvwc20lNyKbw== X-Google-Smtp-Source: AB8JxZpMUYTDgCLPJb/wg+UShDVfpjX6IfBVCGDj+mfBqjRszRLdZVHvegpGTXlc87WcEaOZ7hMMgQ== X-Received: by 2002:a19:9d4b:: with SMTP id g72-v6mr25595041lfe.7.1525870049891; Wed, 09 May 2018 05:47:29 -0700 (PDT) Received: from mkPC.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id l10-v6sm5149258lja.62.2018.05.09.05.47.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 09 May 2018 05:47:29 -0700 (PDT) From: Michal Krawczyk To: Marcin Wojtas , Michal Krawczyk , Guy Tzalik , Evgeny Schemeilin Cc: dev@dpdk.org, matua@amazon.com, Rafal Kozik Date: Wed, 9 May 2018 14:47:05 +0200 Message-Id: <20180509124714.23305-6-mk@semihalf.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180509124714.23305-1-mk@semihalf.com> References: <20180509124714.23305-1-mk@semihalf.com> Subject: [dpdk-dev] [PATCH v1 15/24] net/ena: add info about max number of Tx/Rx descriptors X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Rafal Kozik In function ena_infos_get driver provides information about minimal and maximal number of Rx and Tx descriptors. Signed-off-by: Rafal Kozik Acked-by: Michal Krawczyk --- drivers/net/ena/ena_ethdev.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.14.1 diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index 759b80046..c8ff62ccc 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -85,6 +85,9 @@ #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#define ENA_MAX_RING_DESC ENA_DEFAULT_RING_SIZE +#define ENA_MIN_RING_DESC 128 + enum ethtool_stringset { ETH_SS_TEST = 0, ETH_SS_STATS, @@ -1801,6 +1804,16 @@ static void ena_infos_get(struct rte_eth_dev *dev, adapter->tx_supported_offloads = tx_feat; adapter->rx_supported_offloads = rx_feat; + + dev_info->rx_desc_lim.nb_max = ENA_MAX_RING_DESC; + dev_info->rx_desc_lim.nb_min = ENA_MIN_RING_DESC; + + dev_info->tx_desc_lim.nb_max = ENA_MAX_RING_DESC; + dev_info->tx_desc_lim.nb_min = ENA_MIN_RING_DESC; + dev_info->tx_desc_lim.nb_seg_max = RTE_MIN(ENA_PKT_MAX_BUFS, + feat.max_queues.max_packet_tx_descs); + dev_info->tx_desc_lim.nb_mtu_seg_max = RTE_MIN(ENA_PKT_MAX_BUFS, + feat.max_queues.max_packet_tx_descs); } static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,