From patchwork Tue Feb 27 19:08:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shweta Choudaha X-Patchwork-Id: 35516 X-Patchwork-Delegate: helin.zhang@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C1BEC4CC3; Tue, 27 Feb 2018 20:09:03 +0100 (CET) Received: from mail-wr0-f194.google.com (mail-wr0-f194.google.com [209.85.128.194]) by dpdk.org (Postfix) with ESMTP id BE85F4CC0 for ; Tue, 27 Feb 2018 20:09:02 +0100 (CET) Received: by mail-wr0-f194.google.com with SMTP id n7so26013201wrn.5 for ; Tue, 27 Feb 2018 11:09:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=5qodeubys37xvAK7mL+0usZScGIxlMPwJUgQV95HEhM=; b=MZj6R5u3Xl9hcsa+fPTxwsJ1uvFaLASQxe/zr8FPqY6hTCIf6ekaAKghrcS+noDy9J jZgmxnozBjji56Ebm+BPOBIDyf+XYxW/C0k07QwEgaqsclLfOBgteknrrx7k6o0tELel Q/xW4fs6peaLzwe1kAZBAyujde00L59kJGisppdR1YW0ZYLQ5124xtYsPok1tskVrmL2 G05oyvFWzSSf3rMpQlTYg3oRH3prav0TRFV83e8/bo4Q8istEZm956Al4wpAReJSnSNU Tu8CYXNkkYqWMyVoCe05MRczSPyc5Gh7NnDr6FQJDCPhi2xjWoz3K+cpHsENMQmYOI8A PoFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=5qodeubys37xvAK7mL+0usZScGIxlMPwJUgQV95HEhM=; b=AU1lM6G3AxnGxoHcKJOZlMFn4SEBF0h6FOfYj9IRhE+YyQ73vRlo6zn8wB4gTuI4b4 r+jqf+fwDiiQISikeIk/QROODXYUbbACdg2LCTp6CJi8hnlaExiaU4AiM6CyhPzIy9Y/ IjbQEM0kOhAy5Up7slPqkNovgSmwLqC8QrMW01xxGK+nU38772QShPZ61g/In5PZuzsR m9G99uJUq92yvYDok4t79j8Um+miB9lcWpH/0MQ/2SLH2tor+NAfR6pPRsT9k2FZHZ+K dRlWU83+JIbOQNHEwtDpfRDhIhCrBj8oY5atk137sv4RaqLnBtXCWeY41GiOwhw18zhV eUJg== X-Gm-Message-State: APf1xPDVkEacc4eRlqzZk90t/I3jxcs6xzWaYkMlHsliT/WHL8S3xDtq FYm9rinWkiyGxSbFWDQgbGcOXw== X-Google-Smtp-Source: AG47ELt3DDVMeGppSeWqf0M6yMK0yzi58jH7Tswho5aKVIJRvT8GcTlzQQvBhbvf2iAHh99IWBRrCg== X-Received: by 10.223.161.211 with SMTP id v19mr11719308wrv.184.1519758542195; Tue, 27 Feb 2018 11:09:02 -0800 (PST) Received: from schoudah-dev.vyatta.net ([137.221.143.78]) by smtp.gmail.com with ESMTPSA id x107sm16489003wrb.97.2018.02.27.11.09.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Feb 2018 11:09:01 -0800 (PST) From: Shweta Choudaha To: dev@dpdk.org Cc: shweta.choudaha@att.com Date: Tue, 27 Feb 2018 19:08:46 +0000 Message-Id: <20180227190846.127734-1-shweta.choudaha@gmail.com> X-Mailer: git-send-email 2.11.0 Subject: [dpdk-dev] [PATCH] net/ixgbe: Add read/write PMD MDIO API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Shweta Choudaha Add ixgbe MDIO access APIs to read and write registers using specific device address. This provides MDIO access to any devices that are not associated with the autoprobed PHY.Export these APIs via the map file Signed-off-by: Shweta Choudaha Reviewed-by: Chas Williams Reviewed-by: Luca Boccassi --- drivers/net/ixgbe/rte_pmd_ixgbe.c | 108 ++++++++++++++++++++++++++++ drivers/net/ixgbe/rte_pmd_ixgbe.h | 43 +++++++++++ drivers/net/ixgbe/rte_pmd_ixgbe_version.map | 7 ++ 3 files changed, 158 insertions(+) diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.c b/drivers/net/ixgbe/rte_pmd_ixgbe.c index d8ca8ca31..992ffe70c 100644 --- a/drivers/net/ixgbe/rte_pmd_ixgbe.c +++ b/drivers/net/ixgbe/rte_pmd_ixgbe.c @@ -1012,3 +1012,111 @@ rte_pmd_ixgbe_bypass_wd_reset(uint16_t port_id) return ixgbe_bypass_wd_reset(dev); } #endif + +int __rte_experimental +rte_pmd_ixgbe_mdio_read(uint16_t port, uint32_t reg_addr, + uint32_t dev_type, uint16_t *phy_data) +{ + struct ixgbe_hw *hw; + struct rte_eth_dev *dev; + u32 i, data, command, mask; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV); + dev = &rte_eth_devices[port]; + if (!is_ixgbe_supported(dev)) + return -ENOTSUP; + + hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + if (!hw) + return -ENOTSUP; + + mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM; + + if (hw->mac.ops.acquire_swfw_sync(hw, mask)) + return IXGBE_ERR_SWFW_SYNC; + + /* Setup and write the read command */ + command = (reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) | + (dev_type << IXGBE_MSCA_PHY_ADDR_SHIFT) | + IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_READ_AUTOINC | + IXGBE_MSCA_MDI_COMMAND; + + IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); + + /* Check every 10 usec to see if the access completed. + * The MDI Command bit will clear when the operation is + * complete + */ + for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) { + usec_delay(10); + + command = IXGBE_READ_REG(hw, IXGBE_MSCA); + if (!(command & IXGBE_MSCA_MDI_COMMAND)) + break; + } + if (command & IXGBE_MSCA_MDI_COMMAND) { + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "PHY read command did not complete.\n"); + return IXGBE_ERR_PHY; + } + /* Read operation is complete. Get the data from MSRWD */ + data = IXGBE_READ_REG(hw, IXGBE_MSRWD); + data >>= IXGBE_MSRWD_READ_DATA_SHIFT; + *phy_data = (u16)data; + + hw->mac.ops.release_swfw_sync(hw, mask); + return 0; +} + +int __rte_experimental +rte_pmd_ixgbe_mdio_write(uint16_t port, uint32_t reg_addr, + uint32_t dev_type, uint16_t phy_data) +{ + struct ixgbe_hw *hw; + u32 i, command, mask; + struct rte_eth_dev *dev; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV); + dev = &rte_eth_devices[port]; + if (!is_ixgbe_supported(dev)) + return -ENOTSUP; + + hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + if (!hw) + return -ENOTSUP; + + mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM; + + if (hw->mac.ops.acquire_swfw_sync(hw, mask)) + return IXGBE_ERR_SWFW_SYNC; + + /* Put the data in the MDI single read and write data register*/ + IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); + + /* Setup and write the write command */ + command = (reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) | + (dev_type << IXGBE_MSCA_PHY_ADDR_SHIFT) | + IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_WRITE | + IXGBE_MSCA_MDI_COMMAND; + + IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); + + /* Check every 10 usec to see if the access completed. + * The MDI Command bit will clear when the operation is + * complete + */ + for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) { + usec_delay(10); + + command = IXGBE_READ_REG(hw, IXGBE_MSCA); + if (!(command & IXGBE_MSCA_MDI_COMMAND)) + break; + } + if (command & IXGBE_MSCA_MDI_COMMAND) { + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "PHY write cmd didn't complete\n"); + return IXGBE_ERR_PHY; + } + hw->mac.ops.release_swfw_sync(hw, mask); + return 0; +} diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.h b/drivers/net/ixgbe/rte_pmd_ixgbe.h index 11a9f334b..aab99a99c 100644 --- a/drivers/net/ixgbe/rte_pmd_ixgbe.h +++ b/drivers/net/ixgbe/rte_pmd_ixgbe.h @@ -573,6 +573,49 @@ int rte_pmd_ixgbe_bypass_wd_timeout_show(uint16_t port, uint32_t *wd_timeout); */ int rte_pmd_ixgbe_bypass_wd_reset(uint16_t port); +/** + * Read PHY register using MDIO with swfw semaphore lock + * + * @param port + * The port identifier of the Ethernet device. + * @param reg_addr + * 32 bit PHY Register + * @param dev_type + * Used to define device base address + * @param phy_data + * Pointer for reading PHY register data + * @return + * - (0) if successful. + * - (-ENOTSUP) if hardware doesn't support. + * - (-ENODEV) if *port* invalid. + * - (IXGBE_ERR_PHY) If PHY read command failed + * - (IXGBE_ERR_SWFW_SYNC) If sw/fw semaphore acquisition failed + */ +int __rte_experimental +rte_pmd_ixgbe_mdio_read(uint16_t port, uint32_t reg_addr, + uint32_t dev_type, uint16_t *phy_data); + +/** + * Write data to PHY register using MDIO with swfw semaphore lock + * + * @param port + * The port identifier of the Ethernet device. + * @param reg_addr + * 32 bit PHY Register + * @param dev_type + * Used to define device base address + * @param phy_data + * Data to write to PHY register + * @return + * - (0) if successful. + * - (-ENOTSUP) if hardware doesn't support. + * - (-ENODEV) if *port* invalid. + * - (IXGBE_ERR_PHY) If PHY read command failed + * - (IXGBE_ERR_SWFW_SYNC) If sw/fw semaphore acquisition failed + */ +int __rte_experimental +rte_pmd_ixgbe_mdio_write(uint16_t port, uint32_t reg_addr, + uint32_t dev_type, uint16_t phy_data); /** * Response sent back to ixgbe driver from user app after callback diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map index bf776742c..ce72c732b 100644 --- a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map +++ b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map @@ -52,3 +52,10 @@ DPDK_17.08 { rte_pmd_ixgbe_bypass_wd_timeout_show; rte_pmd_ixgbe_bypass_wd_timeout_store; } DPDK_17.05; + +EXPERIMENTAL { + global: + + rte_pmd_ixgbe_mdio_read; + rte_pmd_ixgbe_mdio_write; +} DPDK_17.08;