From patchwork Thu Nov 23 17:38:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrien Mazarguil X-Patchwork-Id: 31610 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B09972C16; Thu, 23 Nov 2017 18:38:20 +0100 (CET) Received: from mail-wr0-f195.google.com (mail-wr0-f195.google.com [209.85.128.195]) by dpdk.org (Postfix) with ESMTP id 9F1363195 for ; Thu, 23 Nov 2017 18:38:16 +0100 (CET) Received: by mail-wr0-f195.google.com with SMTP id 55so1928763wrx.0 for ; Thu, 23 Nov 2017 09:38:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=bG0EIiMqx+/u64snNka3q9/R70HpH/Q7vAegzycfP34=; b=XTweuFdQ1dD+Csw6qnYTbxEw0SjXEiYg91GZmrJt0qVW2qLGUFZ9a92rBbgQn1QCWL 765wwuk6eRltyWmer3vCz9SeP86VSmZsrWZpNFRTGz26TdiEkUoq14y3fixHSLcO9uNF z10VGFMgAXgClxkx88LyaJij4r/VIp3jj80LrkUc8fpREBudyRFIS3/+lDrQQupxsxgl mnym+DVVuXiP0K56CyJDsoWlS3C+RAxZhFcpLu9aT+DJifEvgb53SZm0t2v5kpNvDpl3 +EFfR5dttByoxVEAK2e2c3IfL/MUmVJNONWPrqpZbYlAa1exGAEJnzJspr3zpORa9NIo OfLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=bG0EIiMqx+/u64snNka3q9/R70HpH/Q7vAegzycfP34=; b=AHtGVlRuT0oS9ewt4D2SgfZt8P7sYedGkfyyGYqOfmuSYNhGCzzlA1QnKf0Vy96t0S 3zZ7p/hO22YzwxkPlQIkR2Q3FB1YsTPpZz3xQW237HLobTJTpSTnoUoNXnzwKw2VoKct TtcrxjpBXzl/9O+75mKpeuz2AAaQBMkoB6IR1ZYG4F0EDeocFu/ydccGeix4PklMiXRR Metr+Sr08DoPvJ3RQPd0IVrnHrxXjZwh3YZAoWnJoLCiGRkdVzyufLXcQlfiSmcdxvWx R5jiHswADtVYyaG3eA+MLSiPHP2FDtARIFJe3XE3cmhHfUAIQyq8cKM0+gtWBe1UlYmr F8KA== X-Gm-Message-State: AJaThX68a54Z5PS58dRLj2N2uMOOqH8u8/iMK8eYz6xDdYlyN46QWVMF BJDS4naVPumlGO0e8Hrzn7s8FA== X-Google-Smtp-Source: AGs4zMb5C00tw6zLHMaAL6r6tpIOuVWRpMRTxZUUCb2Omv1nnUdBRxxDzJnwAOWdqhIfIs+5wnzR6Q== X-Received: by 10.223.178.232 with SMTP id g95mr20801179wrd.53.1511458696380; Thu, 23 Nov 2017 09:38:16 -0800 (PST) Received: from 6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id l31sm33436895wrc.50.2017.11.23.09.38.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 23 Nov 2017 09:38:15 -0800 (PST) Date: Thu, 23 Nov 2017 18:38:04 +0100 From: Adrien Mazarguil To: Shahaf Shuler Cc: Ferruh Yigit , dev@dpdk.org, stable@dpdk.org, Neil Horman Message-ID: <20171123172640.28827-6-adrien.mazarguil@6wind.com> References: <1511272929-17955-1-git-send-email-adrien.mazarguil@6wind.com> <20171123172640.28827-1-adrien.mazarguil@6wind.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20171123172640.28827-1-adrien.mazarguil@6wind.com> X-Mailer: git-send-email 2.11.0 Subject: [dpdk-dev] [PATCH v2 5/5] net/mlx4: restore inner VXLAN RSS support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Inner VXLAN RSS was supported and performed by default prior to the entire mlx4 refactoring that occurred in DPDK 17.11, however so far the new Verbs RSS API did not provide means to enable it. This will be addressed in Linux 4.15 and in RDMA core. Thanks to RSS capabilities, the PMD can now probe for its support and enable it again by default. Signed-off-by: Adrien Mazarguil Acked-by: Neil Horman --- drivers/net/mlx4/mlx4.c | 5 +++-- drivers/net/mlx4/mlx4.h | 5 +++++ drivers/net/mlx4/mlx4_flow.c | 5 ++++- 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index 025b88766..8c20eea41 100644 --- a/drivers/net/mlx4/mlx4.c +++ b/drivers/net/mlx4/mlx4.c @@ -582,14 +582,15 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) priv->hw_rss_sup = device_attr_ex.rss_caps.rx_hash_fields_mask; if (!priv->hw_rss_sup) { WARN("no RSS capabilities reported; disabling support" - " for UDP RSS"); + " for UDP RSS and inner VXLAN RSS"); /* Fake support for all possible RSS hash fields. */ priv->hw_rss_sup = ~UINT64_C(0); priv->hw_rss_sup = mlx4_conv_rss_hf(priv, -1); /* Filter out known unsupported fields. */ priv->hw_rss_sup &= ~(uint64_t)(IBV_RX_HASH_SRC_PORT_UDP | - IBV_RX_HASH_DST_PORT_UDP); + IBV_RX_HASH_DST_PORT_UDP | + IBV_RX_HASH_INNER); } DEBUG("supported RSS hash fields mask: %016" PRIx64, priv->hw_rss_sup); diff --git a/drivers/net/mlx4/mlx4.h b/drivers/net/mlx4/mlx4.h index e5ab934c1..99dc3357a 100644 --- a/drivers/net/mlx4/mlx4.h +++ b/drivers/net/mlx4/mlx4.h @@ -53,6 +53,11 @@ #include #include +#ifndef IBV_RX_HASH_INNER +/** This is not necessarily defined by supported RDMA core versions. */ +#define IBV_RX_HASH_INNER (1ull << 31) +#endif /* IBV_RX_HASH_INNER */ + /** Maximum number of simultaneous MAC addresses. This value is arbitrary. */ #define MLX4_MAX_MAC_ADDRESSES 128 diff --git a/drivers/net/mlx4/mlx4_flow.c b/drivers/net/mlx4/mlx4_flow.c index a41d99dd8..69025da42 100644 --- a/drivers/net/mlx4/mlx4_flow.c +++ b/drivers/net/mlx4/mlx4_flow.c @@ -158,8 +158,11 @@ mlx4_conv_rss_hf(struct priv *priv, uint64_t rss_hf) conv |= out[i]; } if ((conv & priv->hw_rss_sup) == conv) { - if (rss_hf == (uint64_t)-1) + if (rss_hf == (uint64_t)-1) { + /* Include inner RSS by default if supported. */ + conv |= priv->hw_rss_sup & IBV_RX_HASH_INNER; return conv; + } if (!(rss_hf & ~seen)) return conv; }