From patchwork Tue Jun 20 15:22:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 25444 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id B6E89378B; Tue, 20 Jun 2017 18:37:15 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id A310F9E3 for ; Tue, 20 Jun 2017 18:37:14 +0200 (CEST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga104.jf.intel.com with ESMTP; 20 Jun 2017 09:37:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.39,364,1493708400"; d="scan'208"; a="1143133918" Received: from unknown (HELO silpixa00399126.ger.corp.intel.com) ([10.237.223.223]) by orsmga001.jf.intel.com with ESMTP; 20 Jun 2017 09:37:11 -0700 From: Bruce Richardson To: Thomas Monjalon Cc: Bruce Richardson , dev@dpdk.org Date: Tue, 20 Jun 2017 16:22:56 +0100 Message-Id: <20170620152313.107642-2-bruce.richardson@intel.com> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170620152313.107642-1-bruce.richardson@intel.com> References: <20170620152313.107642-1-bruce.richardson@intel.com> Subject: [dpdk-dev] [PATCH 01/18] mk: require SSE4.2 support on all x86 platforms X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Increase the default baseline from "core2" architecture to "corei7". This means that all builds will have SSE4.2 support included, and we can remove special case manipulation of CFLAGS for the same. Naturally, this does mean that some machines that previously could run DPDK now can't do so, but hardware with SSE4.2 has been around for almost a decade now, so this should not be a major problem. Signed-off-by: Bruce Richardson --- mk/machine/default/rte.vars.mk | 2 +- mk/machine/native/rte.vars.mk | 3 --- mk/toolchain/icc/rte.toolchain-compat.mk | 2 +- 3 files changed, 2 insertions(+), 5 deletions(-) diff --git a/mk/machine/default/rte.vars.mk b/mk/machine/default/rte.vars.mk index a6fb842..71a25bc 100644 --- a/mk/machine/default/rte.vars.mk +++ b/mk/machine/default/rte.vars.mk @@ -55,4 +55,4 @@ # CPU_LDFLAGS = # CPU_ASFLAGS = -MACHINE_CFLAGS += -march=core2 +MACHINE_CFLAGS += -march=corei7 diff --git a/mk/machine/native/rte.vars.mk b/mk/machine/native/rte.vars.mk index 7f55b54..f7d98d0 100644 --- a/mk/machine/native/rte.vars.mk +++ b/mk/machine/native/rte.vars.mk @@ -63,8 +63,5 @@ MACHINE_CFLAGS = -march=native # so, set the compilation target to be a corei7, minimum target with SSE4.2. SSE42_SUPPORT=$(shell $(CC) -march=native -dM -E - /dev/null) - ifneq ($(CPU_SSE42_SUPPORT),) MACHINE_CFLAGS = -march=corei7 - endif endif diff --git a/mk/toolchain/icc/rte.toolchain-compat.mk b/mk/toolchain/icc/rte.toolchain-compat.mk index 88f1ac9..3c25d18 100644 --- a/mk/toolchain/icc/rte.toolchain-compat.mk +++ b/mk/toolchain/icc/rte.toolchain-compat.mk @@ -41,7 +41,7 @@ ICC_MAJOR_VERSION = $(shell icc -dumpversion | cut -f1 -d.) ifeq ($(shell test $(ICC_MAJOR_VERSION) -lt 12 && echo 1), 1) - MACHINE_CFLAGS = -xSSE3 + MACHINE_CFLAGS = -xSSE4.2 $(warning You are not using ICC 12.x or higher. This is neither supported, nor tested.) else