From patchwork Wed Mar 27 22:37:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tyler Retzlaff X-Patchwork-Id: 138907 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 031F343D55; Wed, 27 Mar 2024 23:41:13 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F380642E21; Wed, 27 Mar 2024 23:38:43 +0100 (CET) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mails.dpdk.org (Postfix) with ESMTP id 0D41C427E4 for ; Wed, 27 Mar 2024 23:38:08 +0100 (CET) Received: by linux.microsoft.com (Postfix, from userid 1086) id 0BB1F20E6F16; Wed, 27 Mar 2024 15:38:00 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 0BB1F20E6F16 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1711579082; bh=ZqnDN4rQsl4BBRKYZLd7UvHhH4l91mPVZh8rmBb3uPU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=A4Bbl34YMlFCLxTlz42l/22jq2S9ji6zMBoQiRrCKYUsKGYUwY6OheEOvRLkz7YWU 1PFHNHPusZxVIL3G89uNzIMvSqlvzJDdn2XPpKwF5cB9oPd76mIPzbN5+mQ3dTci0M xwYzM8Lpo7Nq8cMwFlSP24C77ahxlMYvNXqslP+E= From: Tyler Retzlaff To: dev@dpdk.org Cc: =?utf-8?q?Mattias_R=C3=B6nnblom?= , =?utf-8?q?Morten_Br=C3=B8rup?= , Abdullah Sevincer , Ajit Khaparde , Alok Prasad , Anatoly Burakov , Andrew Rybchenko , Anoob Joseph , Bruce Richardson , Byron Marohn , Chenbo Xia , Chengwen Feng , Ciara Loftus , Ciara Power , Dariusz Sosnowski , David Hunt , Devendra Singh Rawat , Erik Gabriel Carrillo , Guoyang Zhou , Harman Kalra , Harry van Haaren , Honnappa Nagarahalli , Jakub Grajciar , Jerin Jacob , Jeroen de Borst , Jian Wang , Jiawen Wu , Jie Hai , Jingjing Wu , Joshua Washington , Joyce Kong , Junfeng Guo , Kevin Laatz , Konstantin Ananyev , Liang Ma , Long Li , Maciej Czekaj , Matan Azrad , Maxime Coquelin , Nicolas Chautru , Ori Kam , Pavan Nikhilesh , Peter Mccarthy , Rahul Lakkireddy , Reshma Pattan , Rosen Xu , Ruifeng Wang , Rushil Gupta , Sameh Gobriel , Sivaprasad Tummala , Somnath Kotur , Stephen Hemminger , Suanming Mou , Sunil Kumar Kori , Sunil Uttarwar , Tetsuya Mukawa , Vamsi Attunuru , Viacheslav Ovsiienko , Vladimir Medvedkin , Xiaoyun Wang , Yipeng Wang , Yisen Zhuang , Yuying Zhang , Yuying Zhang , Ziyang Xuan , Tyler Retzlaff Subject: [PATCH v3 31/45] baseband/acc: use rte stdatomic API Date: Wed, 27 Mar 2024 15:37:44 -0700 Message-Id: <1711579078-10624-32-git-send-email-roretzla@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com> References: <1710967892-7046-1-git-send-email-roretzla@linux.microsoft.com> <1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Replace the use of gcc builtin __atomic_xxx intrinsics with corresponding rte_atomic_xxx optional rte stdatomic API. Signed-off-by: Tyler Retzlaff Acked-by: Stephen Hemminger --- drivers/baseband/acc/rte_acc100_pmd.c | 36 +++++++++++++-------------- drivers/baseband/acc/rte_vrb_pmd.c | 46 +++++++++++++++++++++++------------ 2 files changed, 48 insertions(+), 34 deletions(-) diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c index 4f666e5..ee50b9c 100644 --- a/drivers/baseband/acc/rte_acc100_pmd.c +++ b/drivers/baseband/acc/rte_acc100_pmd.c @@ -3673,8 +3673,8 @@ desc_idx = acc_desc_idx_tail(q, *dequeued_descs); desc = q->ring_addr + desc_idx; - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, - __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -3728,8 +3728,8 @@ uint16_t current_dequeued_descs = 0, descs_in_tb; desc = acc_desc_tail(q, *dequeued_descs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, - __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -3742,8 +3742,8 @@ /* Check if last CB in TB is ready to dequeue (and thus * the whole TB) - checking sdone bit. If not return. */ - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)last_desc, - __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)last_desc, + rte_memory_order_relaxed); if (!(atom_desc.rsp.val & ACC_SDONE)) return -1; @@ -3755,8 +3755,8 @@ while (i < descs_in_tb) { desc = acc_desc_tail(q, *dequeued_descs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, - __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); rsp.val = atom_desc.rsp.val; rte_bbdev_log_debug("Resp. desc %p: %x descs %d cbs %d\n", desc, rsp.val, descs_in_tb, desc->req.numCBs); @@ -3793,8 +3793,8 @@ struct rte_bbdev_dec_op *op; desc = acc_desc_tail(q, dequeued_cbs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, - __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -3846,8 +3846,8 @@ struct rte_bbdev_dec_op *op; desc = acc_desc_tail(q, dequeued_cbs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, - __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -3902,8 +3902,8 @@ uint8_t cbs_in_tb = 1, cb_idx = 0; desc = acc_desc_tail(q, dequeued_cbs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, - __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -3919,8 +3919,8 @@ /* Check if last CB in TB is ready to dequeue (and thus * the whole TB) - checking sdone bit. If not return. */ - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)last_desc, - __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)last_desc, + rte_memory_order_relaxed); if (!(atom_desc.rsp.val & ACC_SDONE)) return -1; @@ -3930,8 +3930,8 @@ /* Read remaining CBs if exists */ while (cb_idx < cbs_in_tb) { desc = acc_desc_tail(q, dequeued_cbs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, - __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); rsp.val = atom_desc.rsp.val; rte_bbdev_log_debug("Resp. desc %p: %x r %d c %d\n", desc, rsp.val, cb_idx, cbs_in_tb); diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c index 88b1104..f7c54be 100644 --- a/drivers/baseband/acc/rte_vrb_pmd.c +++ b/drivers/baseband/acc/rte_vrb_pmd.c @@ -3119,7 +3119,8 @@ desc_idx = acc_desc_idx_tail(q, *dequeued_descs); desc = q->ring_addr + desc_idx; - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); if (*dequeued_ops + desc->req.numCBs > max_requested_ops) return -1; @@ -3157,7 +3158,8 @@ struct rte_bbdev_enc_op *op; desc = acc_desc_tail(q, *dequeued_descs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit. */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -3192,7 +3194,8 @@ uint16_t current_dequeued_descs = 0, descs_in_tb; desc = acc_desc_tail(q, *dequeued_descs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); if (*dequeued_ops + 1 > max_requested_ops) return -1; @@ -3208,7 +3211,8 @@ /* Check if last CB in TB is ready to dequeue (and thus * the whole TB) - checking sdone bit. If not return. */ - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)last_desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)last_desc, + rte_memory_order_relaxed); if (!(atom_desc.rsp.val & ACC_SDONE)) return -1; @@ -3220,7 +3224,8 @@ while (i < descs_in_tb) { desc = acc_desc_tail(q, *dequeued_descs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); rsp.val = atom_desc.rsp.val; vrb_update_dequeued_operation(desc, rsp, &op->status, aq_dequeued, true, false); @@ -3246,7 +3251,8 @@ struct rte_bbdev_dec_op *op; desc = acc_desc_tail(q, dequeued_cbs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit. */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -3290,7 +3296,8 @@ struct rte_bbdev_dec_op *op; desc = acc_desc_tail(q, dequeued_cbs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit. */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -3346,7 +3353,8 @@ uint32_t tb_crc_check = 0; desc = acc_desc_tail(q, dequeued_cbs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit. */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -3362,7 +3370,8 @@ /* Check if last CB in TB is ready to dequeue (and thus the whole TB) - checking sdone bit. * If not return. */ - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)last_desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)last_desc, + rte_memory_order_relaxed); if (!(atom_desc.rsp.val & ACC_SDONE)) return -1; @@ -3372,7 +3381,8 @@ /* Read remaining CBs if exists. */ while (cb_idx < cbs_in_tb) { desc = acc_desc_tail(q, dequeued_cbs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); rsp.val = atom_desc.rsp.val; rte_bbdev_log_debug("Resp. desc %p: %x %x %x", desc, rsp.val, desc->rsp.add_info_0, @@ -3790,7 +3800,8 @@ struct rte_bbdev_fft_op *op; desc = acc_desc_tail(q, dequeued_cbs); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -4116,7 +4127,8 @@ uint8_t descs_in_op, i; desc = acc_desc_tail(q, dequeued_ops); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); /* Check fdone bit. */ if (!(atom_desc.rsp.val & ACC_FDONE)) @@ -4127,7 +4139,8 @@ /* Get last CB. */ last_desc = acc_desc_tail(q, dequeued_ops + descs_in_op - 1); /* Check if last op is ready to dequeue by checking fdone bit. If not exit. */ - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)last_desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)last_desc, + rte_memory_order_relaxed); if (!(atom_desc.rsp.val & ACC_FDONE)) return -1; #ifdef RTE_LIBRTE_BBDEV_DEBUG @@ -4137,8 +4150,8 @@ for (i = 1; i < descs_in_op - 1; i++) { last_desc = q->ring_addr + ((q->sw_ring_tail + dequeued_ops + i) & q->sw_ring_wrap_mask); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)last_desc, - __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit( + (uint64_t __rte_atomic *)last_desc, rte_memory_order_relaxed); if (!(atom_desc.rsp.val & ACC_FDONE)) return -1; } @@ -4154,7 +4167,8 @@ for (i = 0; i < descs_in_op; i++) { desc = q->ring_addr + ((q->sw_ring_tail + dequeued_ops + i) & q->sw_ring_wrap_mask); - atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc, __ATOMIC_RELAXED); + atom_desc.atom_hdr = rte_atomic_load_explicit((uint64_t __rte_atomic *)desc, + rte_memory_order_relaxed); rsp.val = atom_desc.rsp.val; vrb_update_dequeued_operation(desc, rsp, &op->status, aq_dequeued, true, false);