diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
index f6c4b3e..4f954e0 100644
--- a/lib/eal/include/generic/rte_atomic.h
+++ b/lib/eal/include/generic/rte_atomic.h
@@ -274,7 +274,8 @@
 static inline void
 rte_atomic16_add(rte_atomic16_t *v, int16_t inc)
 {
-	rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);
+	rte_atomic_fetch_add_explicit((volatile int16_t __rte_atomic *)&v->cnt, inc,
+	    rte_memory_order_seq_cst);
 }
 
 /**
@@ -288,7 +289,8 @@
 static inline void
 rte_atomic16_sub(rte_atomic16_t *v, int16_t dec)
 {
-	rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);
+	rte_atomic_fetch_sub_explicit((volatile int16_t __rte_atomic *)&v->cnt, dec,
+	    rte_memory_order_seq_cst);
 }
 
 /**
@@ -341,7 +343,8 @@
 static inline int16_t
 rte_atomic16_add_return(rte_atomic16_t *v, int16_t inc)
 {
-	return rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;
+	return rte_atomic_fetch_add_explicit((volatile int16_t __rte_atomic *)&v->cnt, inc,
+	    rte_memory_order_seq_cst) + inc;
 }
 
 /**
@@ -361,7 +364,8 @@
 static inline int16_t
 rte_atomic16_sub_return(rte_atomic16_t *v, int16_t dec)
 {
-	return rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;
+	return rte_atomic_fetch_sub_explicit((volatile int16_t __rte_atomic *)&v->cnt, dec,
+	    rte_memory_order_seq_cst) - dec;
 }
 
 /**
@@ -380,7 +384,8 @@
 #ifdef RTE_FORCE_INTRINSICS
 static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
 {
-	return rte_atomic_fetch_add_explicit(&v->cnt, 1, rte_memory_order_seq_cst) + 1 == 0;
+	return rte_atomic_fetch_add_explicit((volatile int16_t __rte_atomic *)&v->cnt, 1,
+	    rte_memory_order_seq_cst) + 1 == 0;
 }
 #endif
 
@@ -400,7 +405,8 @@ static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
 #ifdef RTE_FORCE_INTRINSICS
 static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v)
 {
-	return rte_atomic_fetch_sub_explicit(&v->cnt, 1, rte_memory_order_seq_cst) - 1 == 0;
+	return rte_atomic_fetch_sub_explicit((volatile int16_t __rte_atomic *)&v->cnt, 1,
+	    rte_memory_order_seq_cst) - 1 == 0;
 }
 #endif
 
@@ -553,7 +559,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
 static inline void
 rte_atomic32_add(rte_atomic32_t *v, int32_t inc)
 {
-	rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);
+	rte_atomic_fetch_add_explicit((volatile int32_t __rte_atomic *)&v->cnt, inc,
+	    rte_memory_order_seq_cst);
 }
 
 /**
@@ -567,7 +574,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
 static inline void
 rte_atomic32_sub(rte_atomic32_t *v, int32_t dec)
 {
-	rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);
+	rte_atomic_fetch_sub_explicit((volatile int32_t __rte_atomic *)&v->cnt, dec,
+	    rte_memory_order_seq_cst);
 }
 
 /**
@@ -620,7 +628,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
 static inline int32_t
 rte_atomic32_add_return(rte_atomic32_t *v, int32_t inc)
 {
-	return rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;
+	return rte_atomic_fetch_add_explicit((volatile int32_t __rte_atomic *)&v->cnt, inc,
+	    rte_memory_order_seq_cst) + inc;
 }
 
 /**
@@ -640,7 +649,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
 static inline int32_t
 rte_atomic32_sub_return(rte_atomic32_t *v, int32_t dec)
 {
-	return rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;
+	return rte_atomic_fetch_sub_explicit((volatile int32_t __rte_atomic *)&v->cnt, dec,
+	    rte_memory_order_seq_cst) - dec;
 }
 
 /**
@@ -659,7 +669,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
 #ifdef RTE_FORCE_INTRINSICS
 static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)
 {
-	return rte_atomic_fetch_add_explicit(&v->cnt, 1, rte_memory_order_seq_cst) + 1 == 0;
+	return rte_atomic_fetch_add_explicit((volatile int32_t __rte_atomic *)&v->cnt, 1,
+	    rte_memory_order_seq_cst) + 1 == 0;
 }
 #endif
 
@@ -679,7 +690,8 @@ static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)
 #ifdef RTE_FORCE_INTRINSICS
 static inline int rte_atomic32_dec_and_test(rte_atomic32_t *v)
 {
-	return rte_atomic_fetch_sub_explicit(&v->cnt, 1, rte_memory_order_seq_cst) - 1 == 0;
+	return rte_atomic_fetch_sub_explicit((volatile int32_t __rte_atomic *)&v->cnt, 1,
+	    rte_memory_order_seq_cst) - 1 == 0;
 }
 #endif
 
@@ -885,7 +897,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
 static inline void
 rte_atomic64_add(rte_atomic64_t *v, int64_t inc)
 {
-	rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);
+	rte_atomic_fetch_add_explicit((volatile int64_t __rte_atomic *)&v->cnt, inc,
+	    rte_memory_order_seq_cst);
 }
 #endif
 
@@ -904,7 +917,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
 static inline void
 rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)
 {
-	rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);
+	rte_atomic_fetch_sub_explicit((volatile int64_t __rte_atomic *)&v->cnt, dec,
+	    rte_memory_order_seq_cst);
 }
 #endif
 
@@ -962,7 +976,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
 static inline int64_t
 rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)
 {
-	return rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;
+	return rte_atomic_fetch_add_explicit((volatile int64_t __rte_atomic *)&v->cnt, inc,
+	    rte_memory_order_seq_cst) + inc;
 }
 #endif
 
@@ -986,7 +1001,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
 static inline int64_t
 rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)
 {
-	return rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;
+	return rte_atomic_fetch_sub_explicit((volatile int64_t __rte_atomic *)&v->cnt, dec,
+	    rte_memory_order_seq_cst) - dec;
 }
 #endif
 
diff --git a/lib/eal/include/generic/rte_pause.h b/lib/eal/include/generic/rte_pause.h
index c816e7d..c261689 100644
--- a/lib/eal/include/generic/rte_pause.h
+++ b/lib/eal/include/generic/rte_pause.h
@@ -87,7 +87,8 @@
 {
 	assert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);
 
-	while (rte_atomic_load_explicit(addr, memorder) != expected)
+	while (rte_atomic_load_explicit((volatile uint16_t __rte_atomic *)addr, memorder)
+	    != expected)
 		rte_pause();
 }
 
@@ -97,7 +98,8 @@
 {
 	assert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);
 
-	while (rte_atomic_load_explicit(addr, memorder) != expected)
+	while (rte_atomic_load_explicit((volatile uint32_t __rte_atomic *)addr, memorder)
+	    != expected)
 		rte_pause();
 }
 
@@ -107,7 +109,8 @@
 {
 	assert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);
 
-	while (rte_atomic_load_explicit(addr, memorder) != expected)
+	while (rte_atomic_load_explicit((volatile uint64_t __rte_atomic *)addr, memorder)
+	    != expected)
 		rte_pause();
 }
 
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index cf70e33..6c192f0 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -23,9 +23,10 @@
 	uint64_t val;
 
 	/* trigger a write but don't change the value */
-	val = rte_atomic_load_explicit((volatile uint64_t *)addr, rte_memory_order_relaxed);
-	rte_atomic_compare_exchange_strong_explicit((volatile uint64_t *)addr, &val, val,
-			rte_memory_order_relaxed, rte_memory_order_relaxed);
+	val = rte_atomic_load_explicit((volatile uint64_t __rte_atomic *)addr,
+	    rte_memory_order_relaxed);
+	rte_atomic_compare_exchange_strong_explicit((volatile uint64_t __rte_atomic *)addr,
+	    &val, val, rte_memory_order_relaxed, rte_memory_order_relaxed);
 }
 
 static bool wait_supported;
