From patchwork Tue Apr 4 20:07:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tyler Retzlaff X-Patchwork-Id: 125786 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AD08E428BC; Tue, 4 Apr 2023 22:07:44 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1451742B7E; Tue, 4 Apr 2023 22:07:33 +0200 (CEST) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mails.dpdk.org (Postfix) with ESMTP id CAA6B410FA for ; Tue, 4 Apr 2023 22:07:29 +0200 (CEST) Received: by linux.microsoft.com (Postfix, from userid 1086) id 1A754210DEA2; Tue, 4 Apr 2023 13:07:29 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 1A754210DEA2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1680638849; bh=y2LESmcjgD0IRq5b13XLwCMjQMUjMArfTsoftW1Sj+M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GrpxDcIAS8tTAP2gt44SoxT3y0tCHn2rCyXVhsGSyGRpGq3py7TCfFckQKHZf4Ozx X+4yGsPRNRqy9EJb6Fknz+O3oL+UeyKUTKevIp4tuVHX5tpOnP+rPCmmcaV787a6Z7 r1wLcfb3wIGeyLcFbSGr8vITJ38UcSmcB7z6d73I= From: Tyler Retzlaff To: dev@dpdk.org Cc: bruce.richardson@intel.com, david.marchand@redhat.com, thomas@monjalon.net, mb@smartsharesystems.com, konstantin.ananyev@huawei.com, Tyler Retzlaff Subject: [PATCH v2 3/9] eal: use barrier intrinsics when compiling with msvc Date: Tue, 4 Apr 2023 13:07:21 -0700 Message-Id: <1680638847-26430-4-git-send-email-roretzla@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1680638847-26430-1-git-send-email-roretzla@linux.microsoft.com> References: <1680558751-17931-1-git-send-email-roretzla@linux.microsoft.com> <1680638847-26430-1-git-send-email-roretzla@linux.microsoft.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Inline assembly is not supported for msvc x64 instead use _mm_{s,l,m}fence() intrinsics. Signed-off-by: Tyler Retzlaff --- lib/eal/include/generic/rte_atomic.h | 4 ++++ lib/eal/x86/include/rte_atomic.h | 10 +++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h index 234b268..e973184 100644 --- a/lib/eal/include/generic/rte_atomic.h +++ b/lib/eal/include/generic/rte_atomic.h @@ -116,9 +116,13 @@ * Guarantees that operation reordering does not occur at compile time * for operations directly before and after the barrier. */ +#ifndef RTE_TOOLCHAIN_MSVC #define rte_compiler_barrier() do { \ asm volatile ("" : : : "memory"); \ } while(0) +#else +#define rte_compiler_barrier() _ReadWriteBarrier() +#endif /** * Synchronization fence between threads based on the specified memory order. diff --git a/lib/eal/x86/include/rte_atomic.h b/lib/eal/x86/include/rte_atomic.h index f2ee1a9..7ae3a41 100644 --- a/lib/eal/x86/include/rte_atomic.h +++ b/lib/eal/x86/include/rte_atomic.h @@ -27,9 +27,13 @@ #define rte_rmb() _mm_lfence() +#ifndef RTE_TOOLCHAIN_MSVC #define rte_smp_wmb() rte_compiler_barrier() - #define rte_smp_rmb() rte_compiler_barrier() +#else +#define rte_smp_wmb() _mm_sfence() +#define rte_smp_rmb() _mm_lfence() +#endif /* * From Intel Software Development Manual; Vol 3; @@ -66,11 +70,15 @@ static __rte_always_inline void rte_smp_mb(void) { +#ifndef RTE_TOOLCHAIN_MSVC #ifdef RTE_ARCH_I686 asm volatile("lock addl $0, -128(%%esp); " ::: "memory"); #else asm volatile("lock addl $0, -128(%%rsp); " ::: "memory"); #endif +#else + _mm_mfence(); +#endif } #define rte_io_mb() rte_mb()