From patchwork Fri Jun 25 05:56:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anoob Joseph X-Patchwork-Id: 94832 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 464DAA0C40; Fri, 25 Jun 2021 07:58:09 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E042F410DA; Fri, 25 Jun 2021 07:57:45 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 5F57B40E03 for ; Fri, 25 Jun 2021 07:57:44 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15P5vDbA018286; Thu, 24 Jun 2021 22:57:43 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=P0n354fL6U3cViMoM2L7XH9NEWGdb987x53k/fY3VI0=; b=H7Lfc0iwJlOywNzXXceG+7V+uogz/rww2eVAL+e2f6dQ5W2ieQlcGINME5y7mOYMfhOT bw1YeyEjRpeir6bL+dNYguaEjqUbZG9D7WFhs5F4XauaTszgnZm8ZdZBaLdcsxe0thli vy+6b+v8PTs/3Me2Uq7S1r2g4rclDRYL2BGOSX/SJ+UEWT1nijL4mk9beCJ44ZVrZa7J v+AdiDNwwzLLJpRJyzNkT86g38/kdE6HAkIlZmczyP50XcV2A002hU7WnYLYDUPRcThj JuLisQ0Mp+H1pL368WndXtuRoo2bWM0jG1uqdTZ+2oDIJdg4+xHoY7aBCJh8ff89THFT vA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 39d241shtd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 24 Jun 2021 22:57:43 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 24 Jun 2021 22:57:41 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 24 Jun 2021 22:57:41 -0700 Received: from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218]) by maili.marvell.com (Postfix) with ESMTP id 717DF3F7041; Thu, 24 Jun 2021 22:57:38 -0700 (PDT) From: Anoob Joseph To: Akhil Goyal , Thomas Monjalon CC: Anoob Joseph , Jerin Jacob , "Ankur Dwivedi" , Tejasree Kondoj , , Archana Muniganti Date: Fri, 25 Jun 2021 11:26:19 +0530 Message-ID: <1624600591-29841-9-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624600591-29841-1-git-send-email-anoobj@marvell.com> References: <1624600591-29841-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: PpFvq-r2oUIqiy7ZLjCXlfX0Q8vEREU7 X-Proofpoint-ORIG-GUID: PpFvq-r2oUIqiy7ZLjCXlfX0Q8vEREU7 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-25_02:2021-06-24, 2021-06-25 signatures=0 Subject: [dpdk-dev] [PATCH v2 08/20] crypto/cnxk: add cipher operation in session X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for cipher operation in session. Signed-off-by: Ankur Dwivedi Signed-off-by: Anoob Joseph Signed-off-by: Archana Muniganti Signed-off-by: Tejasree Kondoj --- drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 3 + drivers/crypto/cnxk/cnxk_se.h | 106 +++++++++++++++++++++++++++++++ 2 files changed, 109 insertions(+) diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c index 8ef0e6f..b6d3076 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -457,6 +457,9 @@ sym_session_configure(struct roc_cpt *roc_cpt, int driver_id, sess_priv = priv; switch (ret) { + case CNXK_CPT_CIPHER: + ret = fill_sess_cipher(xform, sess_priv); + break; default: ret = -1; } diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h index 9cccab0..b5a16c4 100644 --- a/drivers/crypto/cnxk/cnxk_se.h +++ b/drivers/crypto/cnxk/cnxk_se.h @@ -28,4 +28,110 @@ struct cnxk_se_sess { struct roc_se_ctx roc_se_ctx; } __rte_cache_aligned; +static __rte_always_inline int +fill_sess_cipher(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess) +{ + struct rte_crypto_cipher_xform *c_form; + roc_se_cipher_type enc_type = 0; /* NULL Cipher type */ + uint32_t cipher_key_len = 0; + uint8_t zsk_flag = 0, aes_ctr = 0, is_null = 0; + + c_form = &xform->cipher; + + if (c_form->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) + sess->cpt_op |= ROC_SE_OP_CIPHER_ENCRYPT; + else if (c_form->op == RTE_CRYPTO_CIPHER_OP_DECRYPT) { + sess->cpt_op |= ROC_SE_OP_CIPHER_DECRYPT; + if (xform->next != NULL && + xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) { + /* Perform decryption followed by auth verify */ + sess->roc_se_ctx.template_w4.s.opcode_minor = + ROC_SE_FC_MINOR_OP_HMAC_FIRST; + } + } else { + plt_dp_err("Unknown cipher operation\n"); + return -1; + } + + switch (c_form->algo) { + case RTE_CRYPTO_CIPHER_AES_CBC: + enc_type = ROC_SE_AES_CBC; + cipher_key_len = 16; + break; + case RTE_CRYPTO_CIPHER_3DES_CBC: + enc_type = ROC_SE_DES3_CBC; + cipher_key_len = 24; + break; + case RTE_CRYPTO_CIPHER_DES_CBC: + /* DES is implemented using 3DES in hardware */ + enc_type = ROC_SE_DES3_CBC; + cipher_key_len = 8; + break; + case RTE_CRYPTO_CIPHER_AES_CTR: + enc_type = ROC_SE_AES_CTR; + cipher_key_len = 16; + aes_ctr = 1; + break; + case RTE_CRYPTO_CIPHER_NULL: + enc_type = 0; + is_null = 1; + break; + case RTE_CRYPTO_CIPHER_KASUMI_F8: + enc_type = ROC_SE_KASUMI_F8_ECB; + cipher_key_len = 16; + zsk_flag = ROC_SE_K_F8; + break; + case RTE_CRYPTO_CIPHER_SNOW3G_UEA2: + enc_type = ROC_SE_SNOW3G_UEA2; + cipher_key_len = 16; + zsk_flag = ROC_SE_ZS_EA; + break; + case RTE_CRYPTO_CIPHER_ZUC_EEA3: + enc_type = ROC_SE_ZUC_EEA3; + cipher_key_len = 16; + zsk_flag = ROC_SE_ZS_EA; + break; + case RTE_CRYPTO_CIPHER_AES_XTS: + enc_type = ROC_SE_AES_XTS; + cipher_key_len = 16; + break; + case RTE_CRYPTO_CIPHER_3DES_ECB: + enc_type = ROC_SE_DES3_ECB; + cipher_key_len = 24; + break; + case RTE_CRYPTO_CIPHER_AES_ECB: + enc_type = ROC_SE_AES_ECB; + cipher_key_len = 16; + break; + case RTE_CRYPTO_CIPHER_3DES_CTR: + case RTE_CRYPTO_CIPHER_AES_F8: + case RTE_CRYPTO_CIPHER_ARC4: + plt_dp_err("Crypto: Unsupported cipher algo %u", c_form->algo); + return -1; + default: + plt_dp_err("Crypto: Undefined cipher algo %u specified", + c_form->algo); + return -1; + } + + if (c_form->key.length < cipher_key_len) { + plt_dp_err("Invalid cipher params keylen %u", + c_form->key.length); + return -1; + } + + sess->zsk_flag = zsk_flag; + sess->aes_gcm = 0; + sess->aes_ctr = aes_ctr; + sess->iv_offset = c_form->iv.offset; + sess->iv_length = c_form->iv.length; + sess->is_null = is_null; + + if (unlikely(roc_se_ciph_key_set(&sess->roc_se_ctx, enc_type, + c_form->key.data, c_form->key.length, + NULL))) + return -1; + + return 0; +} #endif /*_CNXK_SE_H_ */