diff mbox series

[v2,12/17] common/cnxk: add AE microcode defines

Message ID 1624599410-29689-13-git-send-email-anoobj@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series Add CPT in Marvell CNXK common driver |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Anoob Joseph June 25, 2021, 5:36 a.m. UTC 
  From: Kiran Kumar Kokkilagadda <kirankumark@marvell.com>

Microcode AE opcodes support asymmetric operations. Add defines
and structs defined by microcode.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Kiran Kumar Kokkilagadda <kirankumark@marvell.com>

---
 drivers/common/cnxk/roc_ae.h  | 56 +++++++++++++++++++++++++++++++++++++++++++
 drivers/common/cnxk/roc_api.h |  1 +
 drivers/common/cnxk/roc_cpt.h |  3 +++
 3 files changed, 60 insertions(+)
 create mode 100644 drivers/common/cnxk/roc_ae.h
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_ae.h b/drivers/common/cnxk/roc_ae.h
new file mode 100644
index 0000000..c549e18
--- /dev/null
+++ b/drivers/common/cnxk/roc_ae.h
@@ -0,0 +1,56 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef __ROC_AE_H__
+#define __ROC_AE_H__
+
+/* AE opcodes */
+#define ROC_AE_MAJOR_OP_MODEX	     0x03
+#define ROC_AE_MAJOR_OP_ECDSA	     0x04
+#define ROC_AE_MAJOR_OP_ECC	     0x05
+#define ROC_AE_MINOR_OP_MODEX	     0x01
+#define ROC_AE_MINOR_OP_PKCS_ENC     0x02
+#define ROC_AE_MINOR_OP_PKCS_ENC_CRT 0x03
+#define ROC_AE_MINOR_OP_PKCS_DEC     0x04
+#define ROC_AE_MINOR_OP_PKCS_DEC_CRT 0x05
+#define ROC_AE_MINOR_OP_MODEX_CRT    0x06
+#define ROC_AE_MINOR_OP_ECDSA_SIGN   0x01
+#define ROC_AE_MINOR_OP_ECDSA_VERIFY 0x02
+#define ROC_AE_MINOR_OP_ECC_UMP	     0x03
+
+/**
+ * Enumeration roc_ae_ec_id
+ *
+ * Enumerates supported elliptic curves
+ */
+typedef enum {
+	ROC_AE_EC_ID_P192 = 0,
+	ROC_AE_EC_ID_P224 = 1,
+	ROC_AE_EC_ID_P256 = 2,
+	ROC_AE_EC_ID_P384 = 3,
+	ROC_AE_EC_ID_P521 = 4,
+	ROC_AE_EC_ID_PMAX = 5
+} roc_ae_ec_id;
+
+/* Prime and order fields of built-in elliptic curves */
+struct roc_ae_ec_group {
+	struct {
+		/* P521 maximum length */
+		uint8_t data[66];
+		unsigned int length;
+	} prime;
+
+	struct {
+		/* P521 maximum length */
+		uint8_t data[66];
+		unsigned int length;
+	} order;
+};
+
+struct roc_ae_ec_ctx {
+	/* Prime length defined by microcode for EC operations */
+	uint8_t curveid;
+};
+
+#endif /* __ROC_AE_H__ */
diff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h
index d545bb9..546818d 100644
--- a/drivers/common/cnxk/roc_api.h
+++ b/drivers/common/cnxk/roc_api.h
@@ -110,6 +110,7 @@ 
 #include "roc_cpt.h"
 
 /* CPT microcode */
+#include "roc_ae.h"
 #include "roc_ie_on.h"
 #include "roc_ie_ot.h"
 #include "roc_se.h"
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index cb2838e..5577fea 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -7,6 +7,9 @@ 
 
 #include "roc_api.h"
 
+#define ROC_AE_CPT_BLOCK_TYPE1 0
+#define ROC_AE_CPT_BLOCK_TYPE2 1
+
 /* Default engine groups */
 #define ROC_CPT_DFLT_ENG_GRP_SE	   0UL
 #define ROC_CPT_DFLT_ENG_GRP_SE_IE 1UL