From patchwork Tue Apr 13 15:29:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yury Kylulin X-Patchwork-Id: 91284 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1827BA0524; Tue, 13 Apr 2021 17:29:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DE79616112A; Tue, 13 Apr 2021 17:29:57 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 3732C16111F for ; Tue, 13 Apr 2021 17:29:56 +0200 (CEST) IronPort-SDR: G6/8jVKyVtwpZ9rWHtKHNbApMLhqAbY4Us2coQ1lxRw6VRUErT8EIm+aYhrwIo7BsLbAR9u0nr g/sPZmaK7PIA== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="181561896" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="181561896" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 08:29:55 -0700 IronPort-SDR: bwQWtQtTCfMwyNqA2KU6IxjGujeIlU2tkv1Xb6LezhMjnrgooGdM2Cb6lI7iIsoEhyLrUbNEvB Ub8eI65ezAQQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="424299390" Received: from hptestserver.inn.intel.com ([10.125.24.133]) by orsmga008.jf.intel.com with ESMTP; 13 Apr 2021 08:29:53 -0700 From: Yury Kylulin To: beilei.xing@intel.com Cc: dev@dpdk.org, apaul@juniper.net, Yury Kylulin Date: Tue, 13 Apr 2021 18:29:50 +0300 Message-Id: <1618327790-5299-1-git-send-email-yury.kylulin@intel.com> X-Mailer: git-send-email 1.8.3.1 Subject: [dpdk-dev] [PATCH] net/i40e: Add support for 25G AOC/ACC cables X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Enable additional PHY types (25G-AOC and 25G-ACC) for set PHY config command. Signed-off-by: Yury Kylulin Tested-by: Ashish Paul --- drivers/net/i40e/i40e_ethdev.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index c03e4a0..4271740 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -2306,7 +2306,8 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw) phy_conf.phy_type = is_up ? cpu_to_le32(phy_type_mask) : 0; phy_conf.phy_type_ext = is_up ? (I40E_AQ_PHY_TYPE_EXT_25G_KR | I40E_AQ_PHY_TYPE_EXT_25G_CR | I40E_AQ_PHY_TYPE_EXT_25G_SR | - I40E_AQ_PHY_TYPE_EXT_25G_LR) : 0; + I40E_AQ_PHY_TYPE_EXT_25G_LR | I40E_AQ_PHY_TYPE_EXT_25G_AOC | + I40E_AQ_PHY_TYPE_EXT_25G_ACC) : 0; phy_conf.fec_config = phy_ab.fec_cfg_curr_mod_ext_info; phy_conf.eee_capability = phy_ab.eee_capability; phy_conf.eeer = phy_ab.eeer_val;