From patchwork Tue Apr 13 03:14:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xueming Li X-Patchwork-Id: 91159 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5AF6FA0524; Tue, 13 Apr 2021 05:15:23 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 08F791609DB; Tue, 13 Apr 2021 05:15:21 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 3F6EA1609D8 for ; Tue, 13 Apr 2021 05:15:20 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from xuemingl@nvidia.com) with SMTP; 13 Apr 2021 06:15:15 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 13D3EQxt015492; Tue, 13 Apr 2021 06:15:15 +0300 From: Xueming Li To: Thomas Monjalon , Gaetan Rivet Cc: dev@dpdk.org, xuemingl@nvidia.com, Asaf Penso , Ferruh Yigit , Andrew Rybchenko Date: Tue, 13 Apr 2021 03:14:12 +0000 Message-Id: <1618283653-16510-6-git-send-email-xuemingl@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1618283653-16510-1-git-send-email-xuemingl@nvidia.com> References: <1618283653-16510-1-git-send-email-xuemingl@nvidia.com> In-Reply-To: <1608304614-13908-2-git-send-email-xuemingl@nvidia.com> References: <1608304614-13908-2-git-send-email-xuemingl@nvidia.com> Subject: [dpdk-dev] [PATCH v5 5/5] devargs: parse global device syntax X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When parsing a devargs, try to parse using the global device syntax first. Fallback on legacy syntax on error. Example of new global device syntax: -a bus=pci,addr=82:00.0/class=eth/driver=mlx5,dv_flow_en=1 Signed-off-by: Xueming Li Reviewed-by: Gaetan Rivet --- doc/guides/rel_notes/release_21_05.rst | 7 +++++++ lib/librte_eal/common/eal_common_devargs.c | 16 ++++++++++++---- lib/librte_eal/include/rte_devargs.h | 4 ++++ lib/librte_ethdev/rte_ethdev.c | 1 - 4 files changed, 23 insertions(+), 5 deletions(-) diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst index 113b37cddc..ff29c88749 100644 --- a/doc/guides/rel_notes/release_21_05.rst +++ b/doc/guides/rel_notes/release_21_05.rst @@ -55,6 +55,13 @@ New Features Also, make sure to start the actual text at the margin. ======================================================= +* **Enabled new devargs parser.** + + * Enabled devargs syntax + ``bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z`` + * Added bus-level parsing of the devargs syntax. + * Kept compatibility with the legacy syntax as parsing fallback. + * **Added support for Marvell CN10K SoC drivers.** Added Marvell CN10K SoC support. Marvell CN10K SoC are based on Octeon 10 diff --git a/lib/librte_eal/common/eal_common_devargs.c b/lib/librte_eal/common/eal_common_devargs.c index 2d87e63d2a..a81ce973fe 100644 --- a/lib/librte_eal/common/eal_common_devargs.c +++ b/lib/librte_eal/common/eal_common_devargs.c @@ -125,7 +125,6 @@ rte_devargs_layers_parse(struct rte_devargs *devargs, layers[i].str = s; layers[i].kvlist = rte_kvargs_parse_delim(s, NULL, "/"); if (layers[i].kvlist == NULL) { - RTE_LOG(ERR, EAL, "Could not parse %s\n", s); ret = -EINVAL; goto get_out; } @@ -143,7 +142,7 @@ rte_devargs_layers_parse(struct rte_devargs *devargs, kv = &layers[i].kvlist->pairs[0]; if (kv->key == NULL) continue; - if (strcmp(kv->key, "bus") == 0) { + if (strcmp(kv->key, RTE_DEVARGS_KEY_BUS) == 0) { bus = rte_bus_find_by_name(kv->value); if (bus == NULL) { RTE_LOG(ERR, EAL, "Could not find bus \"%s\"\n", @@ -151,7 +150,7 @@ rte_devargs_layers_parse(struct rte_devargs *devargs, ret = -EFAULT; goto get_out; } - } else if (strcmp(kv->key, "class") == 0) { + } else if (strcmp(kv->key, RTE_DEVARGS_KEY_CLASS) == 0) { cls = rte_class_find_by_name(kv->value); if (cls == NULL) { RTE_LOG(ERR, EAL, "Could not find class \"%s\"\n", @@ -159,7 +158,7 @@ rte_devargs_layers_parse(struct rte_devargs *devargs, ret = -EFAULT; goto get_out; } - } else if (strcmp(kv->key, "driver") == 0) { + } else if (strcmp(kv->key, RTE_DEVARGS_KEY_DRIVER) == 0) { /* Ignore */ continue; } @@ -224,6 +223,15 @@ rte_devargs_parse(struct rte_devargs *da, const char *dev) if (da == NULL) return -EINVAL; + /* First parse according global device syntax. */ + if (rte_devargs_layers_parse(da, dev) == 0) { + if (da->bus != NULL || da->cls != NULL) + return 0; + rte_devargs_reset(da); + } + + /* Otherwise fallback to legacy syntax: */ + /* Retrieve eventual bus info */ do { devname = dev; diff --git a/lib/librte_eal/include/rte_devargs.h b/lib/librte_eal/include/rte_devargs.h index 134b44a887..39e34ea02e 100644 --- a/lib/librte_eal/include/rte_devargs.h +++ b/lib/librte_eal/include/rte_devargs.h @@ -25,6 +25,10 @@ extern "C" { #include #include +#define RTE_DEVARGS_KEY_BUS "bus" +#define RTE_DEVARGS_KEY_CLASS "class" +#define RTE_DEVARGS_KEY_DRIVER "driver" + /** * Type of generic device */ diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c index 0419500fc3..c417599f79 100644 --- a/lib/librte_ethdev/rte_ethdev.c +++ b/lib/librte_ethdev/rte_ethdev.c @@ -207,7 +207,6 @@ rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str) * - 0000:08:00.0,representor=[1-3] * - pci:0000:06:00.0,representor=[0,5] * - class=eth,mac=00:11:22:33:44:55 - * A new syntax is in development (not yet supported): * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z */