From patchwork Wed Mar 3 17:46:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6LCi5Y2O5LyfKOatpOaXtuatpOWIu++8iQ==?= X-Patchwork-Id: 88427 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 64DA2A055D; Wed, 3 Mar 2021 18:47:09 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 11A63160722; Wed, 3 Mar 2021 18:47:04 +0100 (CET) Received: from out0-150.mail.aliyun.com (out0-150.mail.aliyun.com [140.205.0.150]) by mails.dpdk.org (Postfix) with ESMTP id E0F3140683 for ; Wed, 3 Mar 2021 18:47:01 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alibaba-inc.com; s=default; t=1614793619; h=From:To:Subject:Date:Message-Id; bh=BGeEh1FDUfUsjQnOMhdc7irXzHQwsBVxWDUzsdYZQ98=; b=jmcdkh3tohwUmhSsZ9KXHBU0Eq52eDKqcT4RWVECdAs61ZrODs1dwUFDPuOXEKcG5zegXhhgg0nmKBn3sASo46j/A4oahvMwSP05LVtKBHFnF4jsv+CX9BU6ZbY46JLDMYimycWIuB9irzu150AHGDjBNIanL6gxikIAGw1GhnI= X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R651e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=ay29a033018047202; MF=huawei.xhw@alibaba-inc.com; NM=1; PH=DS; RN=9; SR=0; TI=SMTPD_---.JfzMLkz_1614793613; Received: from rs3a10040.et2sqa.z1.et2sqa.tbsite.net(mailfrom:huawei.xhw@alibaba-inc.com fp:SMTPD_---.JfzMLkz_1614793613) by smtp.aliyun-inc.com(127.0.0.1); Thu, 04 Mar 2021 01:46:58 +0800 From: " =?utf-8?b?6LCi5Y2O5LyfKOatpOaXtuatpOWIu++8iQ==?= " To: ferruh.yigit@intel.com, maxime.coquelin@redhat.com, david.marchand@redhat.com Cc: , , , , , " =?utf-8?b?6LCi5Y2O5LyfKOatpA==?= =?utf-8?b?5pe25q2k5Yi777yJ?= " Date: Thu, 04 Mar 2021 01:46:51 +0800 Message-Id: <1614793612-91528-2-git-send-email-huawei.xhw@alibaba-inc.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1614793612-91528-1-git-send-email-huawei.xhw@alibaba-inc.com> References: <1614614483-75891-1-git-send-email-huawei.xhw@alibaba-inc.com> <1614793612-91528-1-git-send-email-huawei.xhw@alibaba-inc.com> Subject: [dpdk-dev] [PATCH v9 1/2] bus/pci: use PCI standard sysfs entry to get PIO address X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: "huawei.xhw" Currently virtio PMD asssumes legacy device uses PIO bar. There are three ways to get PIO(PortIO) address for virtio legacy device. under igb_uio, get pio address from uio/uio# sysfs attribute under uio_pci_generic: for X86, get PIO address from /proc/ioport for other ARCH, get PIO address from standard PCI sysfs attribute Actually, igb_uio sysfs attribute exports exactly the same thing as standard PCI sysfs, i.e, pci_dev->resource[] in kernel source code This patch refactors these messy things, and uses standard PCI sysfs attribute. Signed-off-by: huawei xie Reviewed-by: Maxime Coquelin --- drivers/bus/pci/linux/pci.c | 77 ----------------------------------------- drivers/bus/pci/linux/pci_uio.c | 64 ++++++++++++++++++++++++---------- 2 files changed, 46 insertions(+), 95 deletions(-) diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c index 2e1808b..0f38abf 100644 --- a/drivers/bus/pci/linux/pci.c +++ b/drivers/bus/pci/linux/pci.c @@ -677,71 +677,6 @@ int rte_pci_write_config(const struct rte_pci_device *device, } } -#if defined(RTE_ARCH_X86) -static int -pci_ioport_map(struct rte_pci_device *dev, int bar __rte_unused, - struct rte_pci_ioport *p) -{ - uint16_t start, end; - FILE *fp; - char *line = NULL; - char pci_id[16]; - int found = 0; - size_t linesz; - - if (rte_eal_iopl_init() != 0) { - RTE_LOG(ERR, EAL, "%s(): insufficient ioport permissions for PCI device %s\n", - __func__, dev->name); - return -1; - } - - snprintf(pci_id, sizeof(pci_id), PCI_PRI_FMT, - dev->addr.domain, dev->addr.bus, - dev->addr.devid, dev->addr.function); - - fp = fopen("/proc/ioports", "r"); - if (fp == NULL) { - RTE_LOG(ERR, EAL, "%s(): can't open ioports\n", __func__); - return -1; - } - - while (getdelim(&line, &linesz, '\n', fp) > 0) { - char *ptr = line; - char *left; - int n; - - n = strcspn(ptr, ":"); - ptr[n] = 0; - left = &ptr[n + 1]; - - while (*left && isspace(*left)) - left++; - - if (!strncmp(left, pci_id, strlen(pci_id))) { - found = 1; - - while (*ptr && isspace(*ptr)) - ptr++; - - sscanf(ptr, "%04hx-%04hx", &start, &end); - - break; - } - } - - free(line); - fclose(fp); - - if (!found) - return -1; - - p->base = start; - RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%x\n", start); - - return 0; -} -#endif - int rte_pci_ioport_map(struct rte_pci_device *dev, int bar, struct rte_pci_ioport *p) @@ -756,14 +691,8 @@ int rte_pci_write_config(const struct rte_pci_device *device, break; #endif case RTE_PCI_KDRV_IGB_UIO: - ret = pci_uio_ioport_map(dev, bar, p); - break; case RTE_PCI_KDRV_UIO_GENERIC: -#if defined(RTE_ARCH_X86) - ret = pci_ioport_map(dev, bar, p); -#else ret = pci_uio_ioport_map(dev, bar, p); -#endif break; default: break; @@ -830,14 +759,8 @@ int rte_pci_write_config(const struct rte_pci_device *device, break; #endif case RTE_PCI_KDRV_IGB_UIO: - ret = pci_uio_ioport_unmap(p); - break; case RTE_PCI_KDRV_UIO_GENERIC: -#if defined(RTE_ARCH_X86) - ret = 0; -#else ret = pci_uio_ioport_unmap(p); -#endif break; default: break; diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c index f3305a2..01f2a40 100644 --- a/drivers/bus/pci/linux/pci_uio.c +++ b/drivers/bus/pci/linux/pci_uio.c @@ -373,10 +373,13 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar, struct rte_pci_ioport *p) { + FILE *f = NULL; char dirname[PATH_MAX]; char filename[PATH_MAX]; - int uio_num; - unsigned long start; + char buf[BUFSIZ]; + uint64_t phys_addr, end_addr, flags; + unsigned long base; + int i; if (rte_eal_iopl_init() != 0) { RTE_LOG(ERR, EAL, "%s(): insufficient ioport permissions for PCI device %s\n", @@ -384,41 +387,66 @@ return -1; } - uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname), 0); - if (uio_num < 0) + /* open and read addresses of the corresponding resource in sysfs */ + snprintf(filename, sizeof(filename), "%s/" PCI_PRI_FMT "/resource", + rte_pci_get_sysfs_path(), dev->addr.domain, dev->addr.bus, + dev->addr.devid, dev->addr.function); + f = fopen(filename, "r"); + if (f == NULL) { + RTE_LOG(ERR, EAL, "%s(): Cannot open sysfs resource: %s\n", + __func__, strerror(errno)); return -1; + } - /* get portio start */ - snprintf(filename, sizeof(filename), - "%s/portio/port%d/start", dirname, bar); - if (eal_parse_sysfs_value(filename, &start) < 0) { - RTE_LOG(ERR, EAL, "%s(): cannot parse portio start\n", - __func__); - return -1; + for (i = 0; i < bar + 1; i++) { + if (fgets(buf, sizeof(buf), f) == NULL) { + RTE_LOG(ERR, EAL, "%s(): Cannot read sysfs resource\n", __func__); + goto error; + } } - /* ensure we don't get anything funny here, read/write will cast to - * uin16_t */ - if (start > UINT16_MAX) - return -1; + if (pci_parse_one_sysfs_resource(buf, sizeof(buf), &phys_addr, + &end_addr, &flags) < 0) + goto error; + + if (!(flags & IORESOURCE_IO)) { + RTE_LOG(ERR, EAL, "%s(): bar resource other than IO is not supported\n", __func__); + goto error; + } + base = (unsigned long)phys_addr; + RTE_LOG(INFO, EAL, "%s(): PIO BAR %08lx detected\n", __func__, base); + + if (base > UINT16_MAX) + goto error; /* FIXME only for primary process ? */ if (dev->intr_handle.type == RTE_INTR_HANDLE_UNKNOWN) { + int uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname), 0); + if (uio_num < 0) { + RTE_LOG(ERR, EAL, "cannot open %s: %s\n", + dirname, strerror(errno)); + goto error; + } snprintf(filename, sizeof(filename), "/dev/uio%u", uio_num); dev->intr_handle.fd = open(filename, O_RDWR); if (dev->intr_handle.fd < 0) { RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", filename, strerror(errno)); - return -1; + goto error; } dev->intr_handle.type = RTE_INTR_HANDLE_UIO; } - RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%lx\n", start); + RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%lx\n", base); - p->base = start; + p->base = base; p->len = 0; + fclose(f); return 0; +error: + if (f) + fclose(f); + return -1; } #else int