From patchwork Wed Jan 20 11:29:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matan Azrad X-Patchwork-Id: 86961 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8A880A0A05; Wed, 20 Jan 2021 12:30:23 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 787DD140D03; Wed, 20 Jan 2021 12:30:23 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 1FA2C140D07 for ; Wed, 20 Jan 2021 12:30:22 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from matan@nvidia.com) with SMTP; 20 Jan 2021 13:30:18 +0200 Received: from pegasus25.mtr.labs.mlnx. (pegasus25.mtr.labs.mlnx [10.210.16.10]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 10KBTfXA001381; Wed, 20 Jan 2021 13:30:17 +0200 From: Matan Azrad To: dev@dpdk.org Cc: Thomas Monjalon , Ashish Gupta , Fiona Trahe , akhil.goyal@nxp.com Date: Wed, 20 Jan 2021 11:29:27 +0000 Message-Id: <1611142175-409485-4-git-send-email-matan@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1611142175-409485-1-git-send-email-matan@nvidia.com> References: <1610554690-411627-1-git-send-email-matan@nvidia.com> <1611142175-409485-1-git-send-email-matan@nvidia.com> Subject: [dpdk-dev] [PATCH v3 03/11] compress/mlx5: support basic control operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add initial support for the next operations: - dev_configure - dev_close - dev_infos_get Signed-off-by: Matan Azrad Acked-by: Viacheslav Ovsiienko --- drivers/compress/mlx5/mlx5_compress.c | 43 ++++++++++++++++++++++++++++++++--- 1 file changed, 40 insertions(+), 3 deletions(-) diff --git a/drivers/compress/mlx5/mlx5_compress.c b/drivers/compress/mlx5/mlx5_compress.c index 604044c..efb77d0 100644 --- a/drivers/compress/mlx5/mlx5_compress.c +++ b/drivers/compress/mlx5/mlx5_compress.c @@ -21,6 +21,7 @@ #define MLX5_COMPRESS_DRIVER_NAME mlx5_compress #define MLX5_COMPRESS_LOG_NAME pmd.compress.mlx5 +#define MLX5_COMPRESS_MAX_QPS 1024 struct mlx5_compress_priv { TAILQ_ENTRY(mlx5_compress_priv) next; @@ -32,6 +33,7 @@ struct mlx5_compress_priv { uint8_t min_block_size; /* Minimum huffman block size supported by the device. */ struct ibv_pd *pd; + struct rte_compressdev_config dev_config; }; TAILQ_HEAD(mlx5_compress_privs, mlx5_compress_priv) mlx5_compress_priv_list = @@ -40,12 +42,47 @@ struct mlx5_compress_priv { int mlx5_compress_logtype; +const struct rte_compressdev_capabilities mlx5_caps[RTE_COMP_ALGO_LIST_END]; + + +static void +mlx5_compress_dev_info_get(struct rte_compressdev *dev, + struct rte_compressdev_info *info) +{ + RTE_SET_USED(dev); + if (info != NULL) { + info->max_nb_queue_pairs = MLX5_COMPRESS_MAX_QPS; + info->feature_flags = RTE_COMPDEV_FF_HW_ACCELERATED; + info->capabilities = mlx5_caps; + } +} + +static int +mlx5_compress_dev_configure(struct rte_compressdev *dev, + struct rte_compressdev_config *config) +{ + struct mlx5_compress_priv *priv; + + if (dev == NULL || config == NULL) + return -EINVAL; + priv = dev->data->dev_private; + priv->dev_config = *config; + return 0; +} + +static int +mlx5_compress_dev_close(struct rte_compressdev *dev) +{ + RTE_SET_USED(dev); + return 0; +} + static struct rte_compressdev_ops mlx5_compress_ops = { - .dev_configure = NULL, + .dev_configure = mlx5_compress_dev_configure, .dev_start = NULL, .dev_stop = NULL, - .dev_close = NULL, - .dev_infos_get = NULL, + .dev_close = mlx5_compress_dev_close, + .dev_infos_get = mlx5_compress_dev_info_get, .stats_get = NULL, .stats_reset = NULL, .queue_pair_setup = NULL,