@@ -16,3 +16,5 @@ endian = 'little'
[properties]
implementer_id = '0x56'
part_number = '0xd08'
+max_lcores = 16
+max_numa_nodes = 1
@@ -16,3 +16,5 @@ endian = 'little'
# Generate binaries that are portable across all Armv8 machines
implementer_id = 'generic'
part_number = 'generic'
+max_lcores = 256
+max_numa_nodes = 4
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x41'
part_number = '0xd08'
+max_lcores = 16
+max_numa_nodes = 1
@@ -16,3 +16,5 @@ endian = 'little'
[properties]
implementer_id = 'dpaa'
part_number = '0xd08'
+max_lcores = 16
+max_numa_nodes = 1
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x50'
part_number = '0x0'
+max_lcores = 32
+max_numa_nodes = 1
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementor_id = '0x41'
implementor_pn = '0xd0c'
+max_lcores = 64
+max_numa_nodes = 1
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x41'
part_number = '0xd0c'
+max_lcores = 4
+max_numa_nodes = 1
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x41'
part_number = '0xd49'
+max_lcores = 64
+max_numa_nodes = 1
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x43'
part_number = '0xb2'
+max_lcores = 36
+max_numa_nodes = 1
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x41'
part_number = '0xd08'
+max_lcores = 16
+max_numa_nodes = 1
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x43'
part_number = '0xaf'
+max_lcores = 256
+max_numa_nodes = 2
@@ -15,3 +15,5 @@ endian = 'little'
[properties]
implementer_id = '0x43'
part_number = '0xa1'
+max_lcores = 96
+max_numa_nodes = 1
@@ -36,7 +36,8 @@ implementer_generic = {
'flags': [
['RTE_MACHINE', '"armv8a"'],
['RTE_USE_C11_MEM_MODEL', true],
- ['RTE_MAX_LCORE', 256]
+ ['RTE_MAX_LCORE', 256],
+ ['RTE_MAX_NUMA_NODES', 4]
],
'part_number_config': {
'generic': {'machine_args': ['-march=armv8-a+crc',
@@ -61,8 +62,7 @@ part_number_config_arm = {
['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
['RTE_LIBRTE_VHOST_NUMA', false],
['RTE_MAX_MEM_MB', 1048576],
- ['RTE_MAX_LCORE', 80],
- ['RTE_MAX_NUMA_NODES', 1]
+ ['RTE_MAX_LCORE', 80]
]
},
'0xd49': {
@@ -82,7 +82,8 @@ implementer_arm = {
['RTE_MACHINE', '"armv8a"'],
['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64],
- ['RTE_MAX_LCORE', 16]
+ ['RTE_MAX_LCORE', 16],
+ ['RTE_MAX_NUMA_NODES', 1]
],
'part_number_config': part_number_config_arm
}
@@ -119,8 +120,7 @@ implementer_cavium = {
['RTE_ARM_FEATURE_ATOMICS', true],
['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64],
- ['RTE_MAX_LCORE', 256],
- ['RTE_MAX_NUMA_NODES', 2]
+ ['RTE_MAX_LCORE', 256]
]
},
'0xb2': {
@@ -253,6 +253,21 @@ compile_time_cpuflags = []
subdir(arch_subdir)
dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
+# apply cross-specific options
+if meson.is_cross_build()
+ # configure RTE_MAX_LCORE and RTE_MAX_NUMA_NODES from cross file
+ cross_max_lcores = meson.get_cross_property('max_lcores', 0)
+ if cross_max_lcores != 0
+ message('Setting RTE_MAX_LCORE from cross file')
+ dpdk_conf.set('RTE_MAX_LCORE', cross_max_lcores)
+ endif
+ cross_max_numa_nodes = meson.get_cross_property('max_numa_nodes', 0)
+ if cross_max_numa_nodes != 0
+ message('Setting RTE_MAX_NUMA_NODES from cross file')
+ dpdk_conf.set('RTE_MAX_NUMA_NODES', cross_max_numa_nodes)
+ endif
+endif
+
# set the install path for the drivers
dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path)
@@ -134,3 +134,12 @@ you may use various combinations of implementer/part number::
Supported part_numbers for 0x50:
'0x0': emag
+
+Other cross file options
+------------------------
+
+There are other options you may specify in a cross file to tailor the build::
+
+ Supported extra configuration
+ max_numa_nodes = n # will set RTE_MAX_NUMA_NODES
+ max_lcores = n # will set RTE_MAX_LCORE