diff mbox series

[7/8] net/hns3: fix dump register out of range

Message ID 1610631217-14216-8-git-send-email-oulijun@huawei.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers show
Series TM and some bugfixes for hns3 | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Lijun Ou Jan. 14, 2021, 1:33 p.m. UTC
From: Chengchang Tang <tangchengchang@huawei.com>

Currently, when dump the queue interrupt registers, the number of
registers that should be dumped is calculated from num_msi. But the
value of num_msi includes the number of misc interrupts. So, for some
hardware version, like kupeng930, it will lead to an illegal access.

This patch replace num_msi with intr_tqps_num which indicate the
number of interrupts used by the tqps.

Fixes: 936eda25e8da ("net/hns3: support dump register")
Cc: stable@dpdk.org

Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
 drivers/net/hns3/hns3_regs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
index 775e096..f2cb465 100644
--- a/drivers/net/hns3/hns3_regs.c
+++ b/drivers/net/hns3/hns3_regs.c
@@ -300,7 +300,7 @@  hns3_direct_access_regs(struct hns3_hw *hw, uint32_t *data)
 	}
 
 	reg_num = sizeof(tqp_intr_reg_addrs) / sizeof(uint32_t);
-	for (j = 0; j < hw->num_msi; j++) {
+	for (j = 0; j < hw->intr_tqps_num; j++) {
 		reg_offset = HNS3_TQP_INTR_REG_SIZE * j;
 		for (i = 0; i < reg_num; i++)
 			*data++ = hns3_read_dev(hw, tqp_intr_reg_addrs[i] +