From patchwork Mon Jan 11 13:59:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matan Azrad X-Patchwork-Id: 86286 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BD9A3A09FF; Mon, 11 Jan 2021 15:00:01 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 38CD7140D01; Mon, 11 Jan 2021 14:59:44 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 61328140CF6 for ; Mon, 11 Jan 2021 14:59:42 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from matan@nvidia.com) with SMTP; 11 Jan 2021 15:59:40 +0200 Received: from pegasus25.mtr.labs.mlnx. (pegasus25.mtr.labs.mlnx [10.210.16.10]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 10BDxPKL010436; Mon, 11 Jan 2021 15:59:40 +0200 From: Matan Azrad To: dev@dpdk.org Cc: Thomas Monjalon , Ashish Gupta , Fiona Trahe Date: Mon, 11 Jan 2021 13:59:14 +0000 Message-Id: <1610373560-253158-5-git-send-email-matan@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1610373560-253158-1-git-send-email-matan@nvidia.com> References: <1610373560-253158-1-git-send-email-matan@nvidia.com> Subject: [dpdk-dev] [PATCH 04/10] common/mlx5: add compress primitives X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add the GGA compress WQE related structures and definitions. Signed-off-by: Matan Azrad --- drivers/common/mlx5/mlx5_prm.h | 41 +++++++++++++++++++++++++++++++++++++++-- 1 file changed, 39 insertions(+), 2 deletions(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 6f5a6cf..00587e8 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -412,10 +412,23 @@ struct mlx5_cqe_ts { uint8_t op_own; }; +/* GGA */ /* MMO metadata segment */ -#define MLX5_OPCODE_MMO 0x2f -#define MLX5_OPC_MOD_MMO_REGEX 0x4 +#define MLX5_OPCODE_MMO 0x2fu +#define MLX5_OPC_MOD_MMO_REGEX 0x4u +#define MLX5_OPC_MOD_MMO_COMP 0x2u +#define MLX5_OPC_MOD_MMO_DECOMP 0x3u +#define MLX5_OPC_MOD_MMO_DMA 0x1u + +#define WQE_GGA_COMP_WIN_SIZE_OFFSET 12u +#define WQE_GGA_COMP_BLOCK_SIZE_OFFSET 16u +#define WQE_GGA_COMP_DYNAMIC_SIZE_OFFSET 20u +#define MLX5_GGA_COMP_WIN_SIZE_UNITS 1024u +#define MLX5_GGA_COMP_WIN_SIZE_MAX (32u * MLX5_GGA_COMP_WIN_SIZE_UNITS) +#define MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX 15u +#define MLX5_GGA_COMP_LOG_DYNAMIC_SIZE_MAX 15u +#define MLX5_GGA_COMP_LOG_DYNAMIC_SIZE_MIN 0u struct mlx5_wqe_metadata_seg { uint32_t mmo_control_31_0; /* mmo_control_63_32 is in ctrl_seg.imm */ @@ -423,6 +436,30 @@ struct mlx5_wqe_metadata_seg { uint64_t addr; }; +struct mlx5_gga_wqe { + uint32_t opcode; + uint32_t sq_ds; + uint32_t flags; + uint32_t gga_ctrl1; /* ws 12-15, bs 16-19, dyns 20-23. */ + uint32_t gga_ctrl2; + uint32_t opaque_lkey; + uint64_t opaque_vaddr; + struct mlx5_wqe_dseg gather; + struct mlx5_wqe_dseg scatter; +} __rte_packed; + +struct mlx5_gga_compress_opaque { + uint32_t syndrom; + uint32_t reserved0; + uint32_t scattered_length; + uint32_t gathered_length; + uint64_t scatter_crc; + uint64_t gather_crc; + uint32_t crc32; + uint32_t adler32; + uint8_t reserved1[216]; +} __rte_packed; + struct mlx5_ifc_regexp_mmo_control_bits { uint8_t reserved_at_31[0x2]; uint8_t le[0x1];