From patchwork Fri Oct 30 09:40:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timothy McDaniel X-Patchwork-Id: 82877 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B154DA04DF; Fri, 30 Oct 2020 10:40:47 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 40EBABE51; Fri, 30 Oct 2020 10:39:39 +0100 (CET) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 3E876AA1F for ; Fri, 30 Oct 2020 10:39:31 +0100 (CET) IronPort-SDR: bx69A33gKS90SJVyOPie1mgVZROekVWM69Oz54cKJgz/lpOCEMDiWSyTLtPScJGd79wKCUPH7B VUyIveBvrXsg== X-IronPort-AV: E=McAfee;i="6000,8403,9789"; a="230219295" X-IronPort-AV: E=Sophos;i="5.77,432,1596524400"; d="scan'208";a="230219295" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Oct 2020 02:39:30 -0700 IronPort-SDR: jbO2pwt29zm3gbfex5A0tMy8r+RCv+wAShlK8P7DhBZI66PIZdR10xbEOwd8ag66cfObDlog4f ZcPQXWrBIdvA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,432,1596524400"; d="scan'208";a="527062064" Received: from txasoft-yocto.an.intel.com ([10.123.72.192]) by fmsmga005.fm.intel.com with ESMTP; 30 Oct 2020 02:39:29 -0700 From: Timothy McDaniel To: Cc: dev@dpdk.org, erik.g.carrillo@intel.com, gage.eads@intel.com, harry.van.haaren@intel.com, jerinj@marvell.com, thomas@monjalon.net Date: Fri, 30 Oct 2020 04:40:53 -0500 Message-Id: <1604050872-24997-6-git-send-email-timothy.mcdaniel@intel.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1604050872-24997-1-git-send-email-timothy.mcdaniel@intel.com> References: <20200612212434.6852-2-timothy.mcdaniel@intel.com> <1604050872-24997-1-git-send-email-timothy.mcdaniel@intel.com> Subject: [dpdk-dev] [PATCH v8 05/23] event/dlb: add inline functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add miscellaneous inline functions that may be called from multiple files. These functions include inline assembly of new x86 instructions, such as movdir64b, since they are not available as builtin functions in the minimum supported GCC version. Signed-off-by: Timothy McDaniel Reviewed-by: Gage Eads --- drivers/event/dlb/dlb_inline_fns.h | 59 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 drivers/event/dlb/dlb_inline_fns.h diff --git a/drivers/event/dlb/dlb_inline_fns.h b/drivers/event/dlb/dlb_inline_fns.h new file mode 100644 index 0000000..7bbe69e --- /dev/null +++ b/drivers/event/dlb/dlb_inline_fns.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2016-2020 Intel Corporation + */ + +#include "rte_memcpy.h" +#include "rte_io.h" + +/* Inline functions required in more than one source file. */ + +static inline struct dlb_eventdev * +dlb_pmd_priv(const struct rte_eventdev *eventdev) +{ + return eventdev->data->dev_private; +} + +static inline void +dlb_umonitor(volatile void *addr) +{ + asm volatile(".byte 0xf3, 0x0f, 0xae, 0xf7\t\n" + : + : "D" (addr)); +} + +static inline void +dlb_umwait(int state, uint64_t timeout) +{ + uint32_t eax = timeout & UINT32_MAX; + uint32_t edx = timeout >> 32; + + asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7\t\n" + : + : "D" (state), "a" (eax), "d" (edx)); +} + +static inline void +dlb_movntdq_single(void *dest, void *src) +{ + long long *_src = (long long *)src; + __v2di src_data0 = (__v2di){_src[0], _src[1]}; + + __builtin_ia32_movntdq((__v2di *)dest, (__v2di)src_data0); +} + +static inline void +dlb_cldemote(void *addr) +{ + /* Load addr into RSI, then demote the cache line of the address + * contained in that register. + */ + asm volatile(".byte 0x0f, 0x1c, 0x06" :: "S" (addr)); +} + +static inline void +dlb_movdir64b(void *dest, void *src) +{ + asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02" + : + : "a" (dest), "d" (src)); +}