From patchwork Mon Oct 26 11:55:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Slava Ovsiienko X-Patchwork-Id: 82193 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4AB3AA04DC; Mon, 26 Oct 2020 12:56:49 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 67A40354D; Mon, 26 Oct 2020 12:55:34 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 0476C2E1E for ; Mon, 26 Oct 2020 12:55:21 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@nvidia.com) with SMTP; 26 Oct 2020 13:55:18 +0200 Received: from nvidia.com (pegasus12.mtr.labs.mlnx [10.210.17.40]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 09QBt8vZ013951; Mon, 26 Oct 2020 13:55:18 +0200 From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, akozyrev@nvidia.com, rasland@nvidia.com, orika@nvidia.com Date: Mon, 26 Oct 2020 11:55:05 +0000 Message-Id: <1603713305-30991-7-git-send-email-viacheslavo@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1603713305-30991-1-git-send-email-viacheslavo@nvidia.com> References: <1603381371-5360-2-git-send-email-viacheslavo@nvidia.com> <1603713305-30991-1-git-send-email-viacheslavo@nvidia.com> Subject: [dpdk-dev] [PATCH v4 6/6] doc: add buffer split feature limitation to mlx5 guide X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The buffer split feature is mentioned in the mlx5 PMD documentation, the limitation is description is added as well. Signed-off-by: Viacheslav Ovsiienko Acked-by: Matan Azrad --- doc/guides/nics/mlx5.rst | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 66524f1..8dc7c62 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -59,7 +59,8 @@ Features - Multi arch support: x86_64, POWER8, ARMv8, i686. - Multiple TX and RX queues. -- Support for scattered TX and RX frames. +- Support for scattered TX frames. +- Advanced support for scattered Rx frames with tunable buffer attributes. - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues. - RSS using different combinations of fields: L3 only, L4 only or both, and source only, destination only or both. @@ -187,6 +188,9 @@ Limitations the device. In case of ungraceful program termination, some entries may remain present and should be removed manually by other means. +- Buffer split offload is supported with regular Rx burst routine only, + no MPRQ feature or vectorized code can be engaged. + - When Multi-Packet Rx queue is configured (``mprq_en``), a Rx packet can be externally attached to a user-provided mbuf with having EXT_ATTACHED_MBUF in ol_flags. As the mempool for the external buffer is managed by PMD, all the