[v10,2/5] build: add aarch32 meson build flags

Message ID 1600244472-29696-3-git-send-email-juraj.linkes@pantheon.tech (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series aarch64 -> aarch32 cross compilation support |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Juraj Linkeš Sept. 16, 2020, 8:21 a.m. UTC
  Add aarch32 extra build flags and aarch32 machine flags to generic
machine args.
Also modify how arm flags are updated in meson build - for 32-bit build,
update only if cross-compiling.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
---
 config/arm/meson.build | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)
  

Comments

Ruifeng Wang Oct. 21, 2020, 2:24 p.m. UTC | #1
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Juraj Linke?
> Sent: Wednesday, September 16, 2020 4:21 PM
> To: thomas@monjalon.net; bruce.richardson@intel.com;
> aconole@redhat.com; maicolgabriel@hotmail.com
> Cc: juraj.linkes@pantheon.tech; dev@dpdk.org
> Subject: [dpdk-dev] [PATCH v10 2/5] build: add aarch32 meson build flags
> 
> Add aarch32 extra build flags and aarch32 machine flags to generic machine
> args.
> Also modify how arm flags are updated in meson build - for 32-bit build,
> update only if cross-compiling.
> 
> Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
> ---
>  config/arm/meson.build | 20 ++++++++++++++++++--
>  1 file changed, 18 insertions(+), 2 deletions(-)
> 
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> 8728051d5..b29f27097 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -63,6 +63,11 @@ flags_armada = [
>  	['RTE_MAX_LCORE', 16]]
> 
>  flags_default_extra = []
> +flags_aarch32_extra = [
> +        ['RTE_ARCH_ARM_NEON_MEMCPY', false],
> +        ['RTE_ARCH_STRICT_ALIGN', true],
> +        ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
> +        ['RTE_MAX_LCORE', 256]]
>  flags_n1sdp_extra = [
>  	['RTE_MACHINE', '"n1sdp"'],
>  	['RTE_MAX_NUMA_NODES', 1],
> @@ -90,6 +95,7 @@ flags_octeontx2_extra = [  machine_args_generic = [
>  	['default', ['-march=armv8-a+crc']],
>  	['native', ['-march=native']],
> +	['aarch32', ['-march=armv8-a', '-mfpu=neon'], flags_aarch32_extra],
>  	['0xd03', ['-mcpu=cortex-a53']],
>  	['0xd04', ['-mcpu=cortex-a35']],
>  	['0xd07', ['-mcpu=cortex-a57']],
> @@ -129,15 +135,23 @@ impl_0x69 = ['Intel', flags_generic,
> machine_args_generic]  impl_dpaa = ['NXP DPAA', flags_dpaa,
> machine_args_generic]
> 
>  dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
> -
> +update_flags = false
>  if not dpdk_conf.get('RTE_ARCH_64')
>  	dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
>  	dpdk_conf.set('RTE_ARCH_ARM', 1)
>  	dpdk_conf.set('RTE_ARCH_ARMv7', 1)
>  	# the minimum architecture supported, armv7-a, needs the following,
>  	# mk/machine/armv7a/rte.vars.mk sets it too
> -	machine_args += '-mfpu=neon'
> +	if meson.is_cross_build()
> +		update_flags = true
> +		impl_id = meson.get_cross_property('implementor_id',
> 'aarch32')
> +		impl_pn = meson.get_cross_property('implementor_pn',
> 'default')
> +		machine = get_variable('impl_' + impl_id)
> +	else
> +		machine_args += '-mfpu=neon'
> +	endif
>  else
> +	update_flags = true
>  	dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
>  	dpdk_conf.set('RTE_ARCH_ARM64', 1)
> 
> @@ -172,7 +186,9 @@ else
>  		impl_pn = meson.get_cross_property('implementor_pn',
> 'default')
>  		machine = get_variable('impl_' + impl_id)
>  	endif
> +endif
> 
> +if update_flags == true
>  	# Apply Common Defaults. These settings may be overwritten by
> machine
>  	# settings later.
>  	foreach flag: flags_common_default
> --
> 2.20.1

Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
  

Patch

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 8728051d5..b29f27097 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -63,6 +63,11 @@  flags_armada = [
 	['RTE_MAX_LCORE', 16]]
 
 flags_default_extra = []
+flags_aarch32_extra = [
+        ['RTE_ARCH_ARM_NEON_MEMCPY', false],
+        ['RTE_ARCH_STRICT_ALIGN', true],
+        ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+        ['RTE_MAX_LCORE', 256]]
 flags_n1sdp_extra = [
 	['RTE_MACHINE', '"n1sdp"'],
 	['RTE_MAX_NUMA_NODES', 1],
@@ -90,6 +95,7 @@  flags_octeontx2_extra = [
 machine_args_generic = [
 	['default', ['-march=armv8-a+crc']],
 	['native', ['-march=native']],
+	['aarch32', ['-march=armv8-a', '-mfpu=neon'], flags_aarch32_extra],
 	['0xd03', ['-mcpu=cortex-a53']],
 	['0xd04', ['-mcpu=cortex-a35']],
 	['0xd07', ['-mcpu=cortex-a57']],
@@ -129,15 +135,23 @@  impl_0x69 = ['Intel', flags_generic, machine_args_generic]
 impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic]
 
 dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
-
+update_flags = false
 if not dpdk_conf.get('RTE_ARCH_64')
 	dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
 	dpdk_conf.set('RTE_ARCH_ARM', 1)
 	dpdk_conf.set('RTE_ARCH_ARMv7', 1)
 	# the minimum architecture supported, armv7-a, needs the following,
 	# mk/machine/armv7a/rte.vars.mk sets it too
-	machine_args += '-mfpu=neon'
+	if meson.is_cross_build()
+		update_flags = true
+		impl_id = meson.get_cross_property('implementor_id', 'aarch32')
+		impl_pn = meson.get_cross_property('implementor_pn', 'default')
+		machine = get_variable('impl_' + impl_id)
+	else
+		machine_args += '-mfpu=neon'
+	endif
 else
+	update_flags = true
 	dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
 	dpdk_conf.set('RTE_ARCH_ARM64', 1)
 
@@ -172,7 +186,9 @@  else
 		impl_pn = meson.get_cross_property('implementor_pn', 'default')
 		machine = get_variable('impl_' + impl_id)
 	endif
+endif
 
+if update_flags == true
 	# Apply Common Defaults. These settings may be overwritten by machine
 	# settings later.
 	foreach flag: flags_common_default