From patchwork Mon Mar 9 17:19:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Yang X-Patchwork-Id: 66471 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 31B83A052E; Mon, 9 Mar 2020 18:20:07 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6C01C1C06A; Mon, 9 Mar 2020 18:20:06 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 05B131C069 for ; Mon, 9 Mar 2020 18:20:04 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 644401FB; Mon, 9 Mar 2020 10:20:04 -0700 (PDT) Received: from phil-VirtualBox.arm.com (A010647.Arm.com [10.170.242.254]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 27A553F534; Mon, 9 Mar 2020 10:20:01 -0700 (PDT) From: Phil Yang To: honnappa.nagarahalli@arm.com, dev@dpdk.org Cc: david.marchand@redhat.com, olivier.matz@6wind.com, dharmik.thakkar@arm.com, gavin.hu@arm.com, ruifeng.wang@arm.com, nd@arm.com Date: Tue, 10 Mar 2020 01:19:55 +0800 Message-Id: <1583774395-10233-1-git-send-email-phil.yang@arm.com> X-Mailer: git-send-email 2.7.4 Subject: [dpdk-dev] [PATCH] ring: fix unaligned memory access on aarch32 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The 32-bit arm machine doesn't support unaligned memory access. It will cause a bus error on aarch32 with the custom element size ring. Thread 1 "test" received signal SIGBUS, Bus error. __rte_ring_enqueue_elems_64 (n=1, obj_table=0xf5edfe41, prod_head=0, \ r=0xf5edfb80) at /build/dpdk/build/include/rte_ring_elem.h:177 177 ring[idx++] = obj[i++]; Fixes: cc4b218790f6 ("ring: support configurable element size") Signed-off-by: Phil Yang Reviewed-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli --- lib/librte_ring/rte_ring_elem.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/librte_ring/rte_ring_elem.h b/lib/librte_ring/rte_ring_elem.h index 3976757..663addc 100644 --- a/lib/librte_ring/rte_ring_elem.h +++ b/lib/librte_ring/rte_ring_elem.h @@ -160,7 +160,7 @@ __rte_ring_enqueue_elems_64(struct rte_ring *r, uint32_t prod_head, const uint32_t size = r->size; uint32_t idx = prod_head & r->mask; uint64_t *ring = (uint64_t *)&r[1]; - const uint64_t *obj = (const uint64_t *)obj_table; + const unaligned_uint64_t *obj = (const unaligned_uint64_t *)obj_table; if (likely(idx + n < size)) { for (i = 0; i < (n & ~0x3); i += 4, idx += 4) { ring[idx] = obj[i]; @@ -294,7 +294,7 @@ __rte_ring_dequeue_elems_64(struct rte_ring *r, uint32_t prod_head, const uint32_t size = r->size; uint32_t idx = prod_head & r->mask; uint64_t *ring = (uint64_t *)&r[1]; - uint64_t *obj = (uint64_t *)obj_table; + unaligned_uint64_t *obj = (unaligned_uint64_t *)obj_table; if (likely(idx + n < size)) { for (i = 0; i < (n & ~0x3); i += 4, idx += 4) { obj[i] = ring[idx];