[v2,02/15] common/octeontx2: add routine to check if sec capable otx2
Checks
Commit Message
From: Vamsi Attunuru <vattunuru@marvell.com>
This routine returns true if given rte_eth_dev is security offload
capable and belongs to octeontx2.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
---
drivers/common/octeontx2/otx2_common.c | 20 ++++++++++++++++++++
drivers/common/octeontx2/otx2_common.h | 2 ++
.../octeontx2/rte_common_octeontx2_version.map | 1 +
3 files changed, 23 insertions(+)
Comments
On Sat, Jan 18, 2020 at 4:19 PM Anoob Joseph <anoobj@marvell.com> wrote:
>
> From: Vamsi Attunuru <vattunuru@marvell.com>
>
> This routine returns true if given rte_eth_dev is security offload
> capable and belongs to octeontx2.
>
> Signed-off-by: Anoob Joseph <anoobj@marvell.com>
> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
> Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
> ---
> drivers/common/octeontx2/otx2_common.c | 20 ++++++++++++++++++++
> drivers/common/octeontx2/otx2_common.h | 2 ++
> .../octeontx2/rte_common_octeontx2_version.map | 1 +
> 3 files changed, 23 insertions(+)
>
> diff --git a/drivers/common/octeontx2/otx2_common.c b/drivers/common/octeontx2/otx2_common.c
> index 7e45366..2f9b167 100644
> --- a/drivers/common/octeontx2/otx2_common.c
> +++ b/drivers/common/octeontx2/otx2_common.c
> @@ -3,6 +3,7 @@
> */
>
> #include <rte_atomic.h>
> +#include <rte_ethdev.h>
> #include <rte_malloc.h>
> #include <rte_log.h>
>
> @@ -23,6 +24,25 @@ otx2_npa_set_defaults(struct otx2_idev_cfg *idev)
>
> /**
> * @internal
> + * Check if rte_eth_dev is security offload capable otx2_eth_dev
> + */
> +uint8_t
> +otx2_ethdev_is_sec_capable(struct rte_eth_dev *eth_dev)
> +{
> + struct rte_pci_device *pci_dev;
> +
> + pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
> +
> + if (pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_PF ||
> + pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_VF ||
> + pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_AF_VF)
> + return 1;
> +
> + return 0;
> +}
> +
> +/**
> + * @internal
> * Get intra device config structure.
> */
> struct otx2_idev_cfg *
> diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h
> index f62c45d..db0cde1 100644
> --- a/drivers/common/octeontx2/otx2_common.h
> +++ b/drivers/common/octeontx2/otx2_common.h
> @@ -8,6 +8,7 @@
> #include <rte_atomic.h>
> #include <rte_common.h>
> #include <rte_cycles.h>
> +#include <rte_ethdev.h>
> #include <rte_memory.h>
> #include <rte_memzone.h>
> #include <rte_io.h>
> @@ -70,6 +71,7 @@ struct otx2_idev_cfg *otx2_intra_dev_get_cfg(void);
> void otx2_sso_pf_func_set(uint16_t sso_pf_func);
> uint16_t otx2_sso_pf_func_get(void);
> uint16_t otx2_npa_pf_func_get(void);
> +uint8_t otx2_ethdev_is_sec_capable(struct rte_eth_dev *eth_dev);
> struct otx2_npa_lf *otx2_npa_lf_obj_get(void);
> void otx2_npa_set_defaults(struct otx2_idev_cfg *idev);
> int otx2_npa_lf_active(void *dev);
> diff --git a/drivers/common/octeontx2/rte_common_octeontx2_version.map b/drivers/common/octeontx2/rte_common_octeontx2_version.map
> index adad21a..bd9fc41 100644
> --- a/drivers/common/octeontx2/rte_common_octeontx2_version.map
> +++ b/drivers/common/octeontx2/rte_common_octeontx2_version.map
> @@ -6,6 +6,7 @@ DPDK_20.0 {
> otx2_dev_priv_init;
> otx2_disable_irqs;
> otx2_intra_dev_get_cfg;
> + otx2_ethdev_is_sec_capable;
> otx2_logtype_base;
> otx2_logtype_dpi;
> otx2_logtype_mbox;
> --
> 2.7.4
>
Hi Anoob,
>
> From: Vamsi Attunuru <vattunuru@marvell.com>
>
> This routine returns true if given rte_eth_dev is security offload
> capable and belongs to octeontx2.
>
> Signed-off-by: Anoob Joseph <anoobj@marvell.com>
> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
> Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
> ---
> drivers/common/octeontx2/otx2_common.c | 20
> ++++++++++++++++++++
> drivers/common/octeontx2/otx2_common.h | 2 ++
> .../octeontx2/rte_common_octeontx2_version.map | 1 +
> 3 files changed, 23 insertions(+)
>
> diff --git a/drivers/common/octeontx2/otx2_common.c
> b/drivers/common/octeontx2/otx2_common.c
> index 7e45366..2f9b167 100644
> --- a/drivers/common/octeontx2/otx2_common.c
> +++ b/drivers/common/octeontx2/otx2_common.c
> @@ -3,6 +3,7 @@
> */
>
> #include <rte_atomic.h>
> +#include <rte_ethdev.h>
> #include <rte_malloc.h>
> #include <rte_log.h>
>
> @@ -23,6 +24,25 @@ otx2_npa_set_defaults(struct otx2_idev_cfg *idev)
>
> /**
> * @internal
> + * Check if rte_eth_dev is security offload capable otx2_eth_dev
> + */
> +uint8_t
> +otx2_ethdev_is_sec_capable(struct rte_eth_dev *eth_dev)
> +{
> + struct rte_pci_device *pci_dev;
> +
> + pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
> +
> + if (pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_PF ||
> + pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_VF ||
> + pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_AF_VF)
> + return 1;
> +
> + return 0;
> +}
Why is this API defined in common?
This is a capability of ethernet device and is only specific to OCTEONTX2 driver.
- Akhil
Hi Akhil,
Please see inline.
Thanks,
Anoob
> -----Original Message-----
> From: Akhil Goyal <akhil.goyal@nxp.com>
> Sent: Monday, January 27, 2020 12:31 PM
> To: Anoob Joseph <anoobj@marvell.com>; Declan Doherty
> <declan.doherty@intel.com>; Thomas Monjalon <thomas@monjalon.net>
> Cc: Vamsi Krishna Attunuru <vattunuru@marvell.com>; Jerin Jacob
> Kollanukkaran <jerinj@marvell.com>; Narayana Prasad Raju Athreya
> <pathreya@marvell.com>; Kiran Kumar Kokkilagadda
> <kirankumark@marvell.com>; Nithin Kumar Dabilpuram
> <ndabilpuram@marvell.com>; Pavan Nikhilesh Bhagavatula
> <pbhagavatula@marvell.com>; Ankur Dwivedi <adwivedi@marvell.com>;
> Archana Muniganti <marchana@marvell.com>; Tejasree Kondoj
> <ktejasree@marvell.com>; Lukas Bartosik <lbartosik@marvell.com>;
> dev@dpdk.org
> Subject: [EXT] RE: [PATCH v2 02/15] common/octeontx2: add routine to check if
> sec capable otx2
>
> External Email
>
> ----------------------------------------------------------------------
> Hi Anoob,
>
> >
> > From: Vamsi Attunuru <vattunuru@marvell.com>
> >
> > This routine returns true if given rte_eth_dev is security offload
> > capable and belongs to octeontx2.
> >
> > Signed-off-by: Anoob Joseph <anoobj@marvell.com>
> > Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
> > Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
> > ---
> > drivers/common/octeontx2/otx2_common.c | 20
> > ++++++++++++++++++++
> > drivers/common/octeontx2/otx2_common.h | 2 ++
> > .../octeontx2/rte_common_octeontx2_version.map | 1 +
> > 3 files changed, 23 insertions(+)
> >
> > diff --git a/drivers/common/octeontx2/otx2_common.c
> > b/drivers/common/octeontx2/otx2_common.c
> > index 7e45366..2f9b167 100644
> > --- a/drivers/common/octeontx2/otx2_common.c
> > +++ b/drivers/common/octeontx2/otx2_common.c
> > @@ -3,6 +3,7 @@
> > */
> >
> > #include <rte_atomic.h>
> > +#include <rte_ethdev.h>
> > #include <rte_malloc.h>
> > #include <rte_log.h>
> >
> > @@ -23,6 +24,25 @@ otx2_npa_set_defaults(struct otx2_idev_cfg *idev)
> >
> > /**
> > * @internal
> > + * Check if rte_eth_dev is security offload capable otx2_eth_dev */
> > +uint8_t otx2_ethdev_is_sec_capable(struct rte_eth_dev *eth_dev) {
> > + struct rte_pci_device *pci_dev;
> > +
> > + pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
> > +
> > + if (pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_PF ||
> > + pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_VF ||
> > + pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_AF_VF)
> > + return 1;
> > +
> > + return 0;
> > +}
>
> Why is this API defined in common?
> This is a capability of ethernet device and is only specific to OCTEONTX2 driver.
[Anoob] Crypto PMD is querying eth dev device for 'security' capability. If we put the call in ethdev PMD, then there will be a build dependency.
This is required because we need to map crypto queues to eth devices. This is required for outbound processing.
>
> - Akhil
Hi Akhil,
Minor correction. Please see inline.
Thanks,
Anoob
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Anoob Joseph
> Sent: Monday, January 27, 2020 1:33 PM
> To: Akhil Goyal <akhil.goyal@nxp.com>; Declan Doherty
> <declan.doherty@intel.com>; Thomas Monjalon <thomas@monjalon.net>
> Cc: Vamsi Krishna Attunuru <vattunuru@marvell.com>; Jerin Jacob
> Kollanukkaran <jerinj@marvell.com>; Narayana Prasad Raju Athreya
> <pathreya@marvell.com>; Kiran Kumar Kokkilagadda
> <kirankumark@marvell.com>; Nithin Kumar Dabilpuram
> <ndabilpuram@marvell.com>; Pavan Nikhilesh Bhagavatula
> <pbhagavatula@marvell.com>; Ankur Dwivedi <adwivedi@marvell.com>;
> Archana Muniganti <marchana@marvell.com>; Tejasree Kondoj
> <ktejasree@marvell.com>; Lukas Bartosik <lbartosik@marvell.com>;
> dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v2 02/15] common/octeontx2: add routine to
> check if sec capable otx2
>
> Hi Akhil,
>
> Please see inline.
>
> Thanks,
> Anoob
>
> > -----Original Message-----
> > From: Akhil Goyal <akhil.goyal@nxp.com>
> > Sent: Monday, January 27, 2020 12:31 PM
> > To: Anoob Joseph <anoobj@marvell.com>; Declan Doherty
> > <declan.doherty@intel.com>; Thomas Monjalon <thomas@monjalon.net>
> > Cc: Vamsi Krishna Attunuru <vattunuru@marvell.com>; Jerin Jacob
> > Kollanukkaran <jerinj@marvell.com>; Narayana Prasad Raju Athreya
> > <pathreya@marvell.com>; Kiran Kumar Kokkilagadda
> > <kirankumark@marvell.com>; Nithin Kumar Dabilpuram
> > <ndabilpuram@marvell.com>; Pavan Nikhilesh Bhagavatula
> > <pbhagavatula@marvell.com>; Ankur Dwivedi <adwivedi@marvell.com>;
> > Archana Muniganti <marchana@marvell.com>; Tejasree Kondoj
> > <ktejasree@marvell.com>; Lukas Bartosik <lbartosik@marvell.com>;
> > dev@dpdk.org
> > Subject: [EXT] RE: [PATCH v2 02/15] common/octeontx2: add routine to
> > check if sec capable otx2
> >
> > External Email
> >
> > ----------------------------------------------------------------------
> > Hi Anoob,
> >
> > >
> > > From: Vamsi Attunuru <vattunuru@marvell.com>
> > >
> > > This routine returns true if given rte_eth_dev is security offload
> > > capable and belongs to octeontx2.
> > >
> > > Signed-off-by: Anoob Joseph <anoobj@marvell.com>
> > > Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
> > > Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
> > > ---
> > > drivers/common/octeontx2/otx2_common.c | 20
> > > ++++++++++++++++++++
> > > drivers/common/octeontx2/otx2_common.h | 2 ++
> > > .../octeontx2/rte_common_octeontx2_version.map | 1 +
> > > 3 files changed, 23 insertions(+)
> > >
> > > diff --git a/drivers/common/octeontx2/otx2_common.c
> > > b/drivers/common/octeontx2/otx2_common.c
> > > index 7e45366..2f9b167 100644
> > > --- a/drivers/common/octeontx2/otx2_common.c
> > > +++ b/drivers/common/octeontx2/otx2_common.c
> > > @@ -3,6 +3,7 @@
> > > */
> > >
> > > #include <rte_atomic.h>
> > > +#include <rte_ethdev.h>
> > > #include <rte_malloc.h>
> > > #include <rte_log.h>
> > >
> > > @@ -23,6 +24,25 @@ otx2_npa_set_defaults(struct otx2_idev_cfg *idev)
> > >
> > > /**
> > > * @internal
> > > + * Check if rte_eth_dev is security offload capable otx2_eth_dev
> > > +*/ uint8_t otx2_ethdev_is_sec_capable(struct rte_eth_dev *eth_dev) {
> > > + struct rte_pci_device *pci_dev;
> > > +
> > > + pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
> > > +
> > > + if (pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_PF ||
> > > + pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_VF ||
> > > + pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_AF_VF)
> > > + return 1;
> > > +
> > > + return 0;
> > > +}
> >
> > Why is this API defined in common?
> > This is a capability of ethernet device and is only specific to OCTEONTX2 driver.
>
> [Anoob] Crypto PMD is querying eth dev device for 'security' capability. If we put
> the "definition" in ethdev PMD, then there will be a build dependency.
[Anoob] Minor correction in the above line.
>
> This is required because we need to map crypto queues to eth devices. This is
> required for outbound processing.
>
> >
> > - Akhil
@@ -3,6 +3,7 @@
*/
#include <rte_atomic.h>
+#include <rte_ethdev.h>
#include <rte_malloc.h>
#include <rte_log.h>
@@ -23,6 +24,25 @@ otx2_npa_set_defaults(struct otx2_idev_cfg *idev)
/**
* @internal
+ * Check if rte_eth_dev is security offload capable otx2_eth_dev
+ */
+uint8_t
+otx2_ethdev_is_sec_capable(struct rte_eth_dev *eth_dev)
+{
+ struct rte_pci_device *pci_dev;
+
+ pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+
+ if (pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_PF ||
+ pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_VF ||
+ pci_dev->id.device_id == PCI_DEVID_OCTEONTX2_RVU_AF_VF)
+ return 1;
+
+ return 0;
+}
+
+/**
+ * @internal
* Get intra device config structure.
*/
struct otx2_idev_cfg *
@@ -8,6 +8,7 @@
#include <rte_atomic.h>
#include <rte_common.h>
#include <rte_cycles.h>
+#include <rte_ethdev.h>
#include <rte_memory.h>
#include <rte_memzone.h>
#include <rte_io.h>
@@ -70,6 +71,7 @@ struct otx2_idev_cfg *otx2_intra_dev_get_cfg(void);
void otx2_sso_pf_func_set(uint16_t sso_pf_func);
uint16_t otx2_sso_pf_func_get(void);
uint16_t otx2_npa_pf_func_get(void);
+uint8_t otx2_ethdev_is_sec_capable(struct rte_eth_dev *eth_dev);
struct otx2_npa_lf *otx2_npa_lf_obj_get(void);
void otx2_npa_set_defaults(struct otx2_idev_cfg *idev);
int otx2_npa_lf_active(void *dev);
@@ -6,6 +6,7 @@ DPDK_20.0 {
otx2_dev_priv_init;
otx2_disable_irqs;
otx2_intra_dev_get_cfg;
+ otx2_ethdev_is_sec_capable;
otx2_logtype_base;
otx2_logtype_dpi;
otx2_logtype_mbox;