From patchwork Mon Sep 16 11:27:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Hu X-Patchwork-Id: 59277 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D41951C0AF; Mon, 16 Sep 2019 13:27:36 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 7DE001C0AD for ; Mon, 16 Sep 2019 13:27:32 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8C6391570; Mon, 16 Sep 2019 04:27:31 -0700 (PDT) Received: from net-arm-thunderx2-01.test.ast.arm.com (net-arm-thunderx2-01.shanghai.arm.com [10.169.40.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6304A3F59C; Mon, 16 Sep 2019 04:27:29 -0700 (PDT) From: Gavin Hu To: dev@dpdk.org Cc: nd@arm.com, thomas@monjalon.net, bruce.richardson@intel.com, yong.liu@intel.com, yinan.wang@intel.com, ajit.khaparde@broadcom.com, somnath.kotur@broadcom.com, Honnappa.Nagarahalli@arm.com, ruifeng.wang@arm.com, steve.capper@arm.com Date: Mon, 16 Sep 2019 19:27:14 +0800 Message-Id: <1568633238-47888-2-git-send-email-gavin.hu@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1568633238-47888-1-git-send-email-gavin.hu@arm.com> References: <1568633238-47888-1-git-send-email-gavin.hu@arm.com> In-Reply-To: <1567751873-15964-1-git-send-email-gavin.hu@arm.com> References: <1567751873-15964-1-git-send-email-gavin.hu@arm.com> Subject: [dpdk-dev] [PATCH v2 1/5] net/i40e: use relaxed and remove duplicate barrier X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" To guarantee the orderings of successive stores to CIO and MMIO memory, a lighter weight rte_io_wmb [1] can be used instead of rte_wmb, and since the I40E_PCI_REG_WRITE API already has an inclusive rte_io_wmb, this explicit call can be even saved. [1] http://git.dpdk.org/dpdk/tree/lib/librte_eal/common/include/generic/ rte_atomic.h#n98 Signed-off-by: Gavin Hu Acked-by: Qi Zhang --- drivers/net/i40e/i40e_rxtx.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index 692c3ba..bfe161f 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -564,8 +564,7 @@ i40e_rx_alloc_bufs(struct i40e_rx_queue *rxq) } /* Update rx tail regsiter */ - rte_wmb(); - I40E_PCI_REG_WRITE_RELAXED(rxq->qrx_tail, rxq->rx_free_trigger); + I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->rx_free_trigger); rxq->rx_free_trigger = (uint16_t)(rxq->rx_free_trigger + rxq->rx_free_thresh); @@ -1208,13 +1207,11 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) } end_of_tx: - rte_wmb(); - PMD_TX_LOG(DEBUG, "port_id=%u queue_id=%u tx_tail=%u nb_tx=%u", (unsigned) txq->port_id, (unsigned) txq->queue_id, (unsigned) tx_id, (unsigned) nb_tx); - I40E_PCI_REG_WRITE_RELAXED(txq->qtx_tail, tx_id); + I40E_PCI_REG_WRITE(txq->qtx_tail, tx_id); txq->tx_tail = tx_id; return nb_tx; @@ -1365,8 +1362,7 @@ tx_xmit_pkts(struct i40e_tx_queue *txq, txq->tx_tail = 0; /* Update the tx tail register */ - rte_wmb(); - I40E_PCI_REG_WRITE_RELAXED(txq->qtx_tail, txq->tx_tail); + I40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail); return nb_pkts; } @@ -1544,8 +1540,6 @@ i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) return err; } - rte_wmb(); - /* Init the RX tail regieter. */ I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);