From patchwork Sun Aug 4 13:56:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Slava Ovsiienko X-Patchwork-Id: 57411 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 360A11BEAE; Sun, 4 Aug 2019 15:56:08 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 7F8581BE6B for ; Sun, 4 Aug 2019 15:56:07 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE2 (envelope-from viacheslavo@mellanox.com) with ESMTPS (AES256-SHA encrypted); 4 Aug 2019 16:56:05 +0300 Received: from pegasus12.mtr.labs.mlnx (pegasus12.mtr.labs.mlnx [10.210.17.40]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x74Du4lR003545; Sun, 4 Aug 2019 16:56:04 +0300 Received: from pegasus12.mtr.labs.mlnx (localhost [127.0.0.1]) by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id x74Du4Ml031566; Sun, 4 Aug 2019 13:56:04 GMT Received: (from viacheslavo@localhost) by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id x74Du4xF031565; Sun, 4 Aug 2019 13:56:04 GMT X-Authentication-Warning: pegasus12.mtr.labs.mlnx: viacheslavo set sender to viacheslavo@mellanox.com using -f From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: yskoh@mellanox.com, shahafs@mellanox.com Date: Sun, 4 Aug 2019 13:56:03 +0000 Message-Id: <1564926963-31523-1-git-send-email-viacheslavo@mellanox.com> X-Mailer: git-send-email 1.8.3.1 Subject: [dpdk-dev] [PATCH] net/mlx5: fix packet size inline settings X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch fixes the default settings for packet size to inline with Enhanced Multi-Packet Write feature, allowing 256B packets to be inlined with Out-Of-the-Box settings. Fixes: 50724e1bba76 ("net/mlx5: update Tx definitions") Signed-off-by: Viacheslav Ovsiienko Acked-by: Matan Azrad --- doc/guides/nics/mlx5.rst | 2 +- drivers/net/mlx5/mlx5_prm.h | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 46538b8..5102bcd 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -449,7 +449,7 @@ Run-time configuration and CPU resources are scarce), data inline is not performed by the driver. Assigning ``txqs_min_inline`` with zero always enables the data inline. - The default ``txq_inline_mpw`` value is 188. The specified value may be adjusted + The default ``txq_inline_mpw`` value is 268. The specified value may be adjusted by the driver in order not to exceed the limit (930 bytes) and to provide better WQE space filling without gaps, the adjustment is reflected in the debug log. Due to multiple packets may be included to the same WQE with Enhanced Multi diff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h index 4ee6d89..d62837e 100644 --- a/drivers/net/mlx5/mlx5_prm.h +++ b/drivers/net/mlx5/mlx5_prm.h @@ -72,9 +72,8 @@ * boundary with accounting the title Control and Ethernet * segments. */ -#define MLX5_EMPW_DEF_INLINE_LEN (3u * MLX5_WQE_SIZE + \ - MLX5_DSEG_MIN_INLINE_SIZE - \ - MLX5_WQE_DSEG_SIZE) +#define MLX5_EMPW_DEF_INLINE_LEN (4u * MLX5_WQE_SIZE + \ + MLX5_DSEG_MIN_INLINE_SIZE) /* * Maximal inline data length sent with enhanced MPW. * Is based on maximal WQE size.