From patchwork Tue Apr 23 11:19:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ori Kam X-Patchwork-Id: 52995 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DEC191B445; Tue, 23 Apr 2019 13:19:25 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 5A2071B43F for ; Tue, 23 Apr 2019 13:19:24 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@mellanox.com) with ESMTPS (AES256-SHA encrypted); 23 Apr 2019 14:19:21 +0300 Received: from pegasus03.mtr.labs.mlnx (pegasus03.mtr.labs.mlnx [10.210.16.124]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3NBJLng002833; Tue, 23 Apr 2019 14:19:21 +0300 From: Ori Kam To: yskoh@mellanox.com, shahafs@mellanox.com, matan@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Tue, 23 Apr 2019 11:19:16 +0000 Message-Id: <1556018356-86706-1-git-send-email-orika@mellanox.com> X-Mailer: git-send-email 1.8.3.1 Subject: [dpdk-dev] [PATCH] net/mlx5: fix E-Switch flow without port item X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When creating a flow rule without the port_id pattern item, always the PF was selected. This commit fixes this issue, if no port_id pattern item is available then we use the port that the flow was created on as source port. Fixes: 822fb3195348 ("net/mlx5: add port id item to Direct Verbs") Signed-off-by: Ori Kam --- drivers/net/mlx5/mlx5_flow_dv.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index c2a2fc6..d17adbe 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -3623,6 +3623,8 @@ struct field_modify_info modify_tcp[] = { union flow_dv_attr flow_attr = { .attr = 0 }; struct mlx5_flow_dv_tag_resource tag_resource; uint32_t modify_action_position = UINT32_MAX; + void *match_mask = matcher.mask.buf; + void *match_value = dev_flow->dv.value.buf; flow->group = attr->group; if (attr->transfer) @@ -3895,23 +3897,8 @@ struct field_modify_info modify_tcp[] = { } dev_flow->dv.actions_n = actions_n; flow->actions = action_flags; - if (attr->ingress && !attr->transfer && - (priv->representor || priv->master)) { - /* It was validated - we support unidirection flows only. */ - assert(!attr->egress); - /* - * Add matching on source vport index only - * for ingress rules in E-Switch configurations. - */ - flow_dv_translate_item_source_vport(matcher.mask.buf, - dev_flow->dv.value.buf, - priv->vport_id, - 0xffff); - } for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); - void *match_mask = matcher.mask.buf; - void *match_value = dev_flow->dv.value.buf; switch (items->type) { case RTE_FLOW_ITEM_TYPE_PORT_ID: @@ -4018,6 +4005,19 @@ struct field_modify_info modify_tcp[] = { } item_flags |= last_item; } + if (((attr->ingress && !attr->transfer) || + (attr->transfer && !(item_flags & MLX5_FLOW_ITEM_PORT_ID))) && + (priv->representor || priv->master)) { + /* It was validated - we support unidirection flows only. */ + assert(!attr->egress); + /* + * Add matching on source vport index only + * for ingress rules in E-Switch configurations. + */ + if (flow_dv_translate_item_port_id(dev, match_mask, + match_value, NULL)) + return -rte_errno; + } assert(!flow_dv_check_valid_spec(matcher.mask.buf, dev_flow->dv.value.buf)); dev_flow->layers = item_flags;