[1/2] net/mlx5: fix complete queue compression device argument
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Commit Message
This patch fixs cqe_comp devarg that always enabled according fw.
Fixes: 7fe24446e946 ("net/mlx5: add device configuration structure")
Cc: shahafs@mellanox.com
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
---
drivers/net/mlx5/mlx5.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
Comments
Sorry, these 2 patches are candidates for stable.
> -----Original Message-----
> From: Xueming Li <xuemingl@mellanox.com>
> Sent: Wednesday, October 24, 2018 4:40 PM
> To: Shahaf Shuler <shahafs@mellanox.com>; Yongseok Koh <yskoh@mellanox.com>
> Cc: Xueming(Steven) Li <xuemingl@mellanox.com>; dev@dpdk.org
> Subject: [PATCH 1/2] net/mlx5: fix complete queue compression device argument
>
> This patch fixs cqe_comp devarg that always enabled according fw.
>
> Fixes: 7fe24446e946 ("net/mlx5: add device configuration structure")
> Cc: shahafs@mellanox.com
>
> Signed-off-by: Xueming Li <xuemingl@mellanox.com>
> ---
> drivers/net/mlx5/mlx5.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 97be494..01080c1 100644
> --- a/drivers/net/mlx5/mlx5.c
> +++ b/drivers/net/mlx5/mlx5.c
> @@ -710,6 +710,7 @@
> struct ibv_pd *pd = NULL;
> struct mlx5dv_context dv_attr = { .comp_mask = 0 };
> struct mlx5_dev_config config = {
> + .cqe_comp = 1,
> .vf = !!vf,
> .mps = MLX5_ARG_UNSET,
> .tx_vec_en = 1,
> @@ -841,7 +842,8 @@
> cqe_comp = 0;
> else
> cqe_comp = 1;
> - config.cqe_comp = cqe_comp;
> + if (config.cqe_comp)
> + config.cqe_comp = cqe_comp;
> #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
> if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
> tunnel_en = ((dv_attr.tunnel_offloads_caps & @@ -1056,10 +1058,8 @@
> DRV_LOG(INFO, "%sMPS is %s",
> config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
> config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
> - if (config.cqe_comp && !cqe_comp) {
> + if (!config.cqe_comp)
> DRV_LOG(WARNING, "Rx CQE compression isn't supported");
> - config.cqe_comp = 0;
> - }
> if (config.mprq.enabled && mprq) {
> if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
> config.mprq.stride_num_n < mprq_min_stride_num_n) {
> --
> 1.8.3.1
@@ -710,6 +710,7 @@
struct ibv_pd *pd = NULL;
struct mlx5dv_context dv_attr = { .comp_mask = 0 };
struct mlx5_dev_config config = {
+ .cqe_comp = 1,
.vf = !!vf,
.mps = MLX5_ARG_UNSET,
.tx_vec_en = 1,
@@ -841,7 +842,8 @@
cqe_comp = 0;
else
cqe_comp = 1;
- config.cqe_comp = cqe_comp;
+ if (config.cqe_comp)
+ config.cqe_comp = cqe_comp;
#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
tunnel_en = ((dv_attr.tunnel_offloads_caps &
@@ -1056,10 +1058,8 @@
DRV_LOG(INFO, "%sMPS is %s",
config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
- if (config.cqe_comp && !cqe_comp) {
+ if (!config.cqe_comp)
DRV_LOG(WARNING, "Rx CQE compression isn't supported");
- config.cqe_comp = 0;
- }
if (config.mprq.enabled && mprq) {
if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
config.mprq.stride_num_n < mprq_min_stride_num_n) {