From patchwork Fri Jun 29 10:24:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rafal Kozik X-Patchwork-Id: 41936 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 10EB81B4E9; Fri, 29 Jun 2018 12:24:47 +0200 (CEST) Received: from mail-lf0-f68.google.com (mail-lf0-f68.google.com [209.85.215.68]) by dpdk.org (Postfix) with ESMTP id E39C51B4DE for ; Fri, 29 Jun 2018 12:24:43 +0200 (CEST) Received: by mail-lf0-f68.google.com with SMTP id n96-v6so6437946lfi.1 for ; Fri, 29 Jun 2018 03:24:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lKm5iTnEQ6Sk/dL/jb/9lbPgyy2fSSjwpCqErLvTbqQ=; b=GIz3NuDLma9dfgJY0byVA81lygCG3Mmxl+ccCnbI+GSgBH1DjiWcK5Vz4Xm8+Fe17y Pw9AyVsARtTKZIA8rn0uMB/v2qn/uQ9p/0JbOth8iVOL2cAmrrCFhpddQg5P/gB2w/UQ 8cPQgKwtFOhmC8LdUwy7XyqhnlbkOLbwz58jC7yZk1qzv5zXOovboU5S0hFyd1Tc+WSv btNsWrtLBP0Kb0Leg8s1QgF/mJe72cv9+JOfyt05G+swS7OJEwPImLMcg9JBoGPr/VQ/ uuY7IqfdmRndy3mZ6nkiQj0tzGlLD5qseNGvOPqDIDlTIkomEPvdJ/iR/Av0UCodTsyY ZxMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lKm5iTnEQ6Sk/dL/jb/9lbPgyy2fSSjwpCqErLvTbqQ=; b=JSSxU0xNX4+7uwE018k8hRcgXuRVU2ET76qyaCvi/7fFJ0VYroj8rTUTAData4FAOu 0OoE2dhVYkXL7xBYuI9RbfGVLyWaMz2FmspDJ2WQsKGvjeuU8dxl6nhtG6FR48P4hoqz QSBNrsJr6jJGZUgnnMKG+3x8LFvUW1SKC/C3wkwnO6RuHTyvM0X5BMsz6igLDlusvmAs nwuFrG2LIJDCNEP049mtMQbAPi8eI8r0ubfyOnYMpxZ1QLkN0/XlAEIProM8MS7+xFMW 51+Y6bpO7nltIAOXK4MxI35a4RLTv0h92iKN7uerkif6lU5R4eSO8Oz0G8w6cSeXvkdQ RCnA== X-Gm-Message-State: APt69E0b0ibH60FixmwBp1feuMkuBMo8++dUjKyMQcHKD7BxwyLeot6m L5FhePDcHSP1ys5qwysB6rbhFR03hN8fvQ== X-Google-Smtp-Source: AAOMgpcd0qLtEuPn8rNol5RoQ2/gl/KqbiinPVk3V2+CdG8OacR5PAblRo537VL1aspvb/JYediSrQ== X-Received: by 2002:a19:c64c:: with SMTP id w73-v6mr8952178lff.2.1530267883151; Fri, 29 Jun 2018 03:24:43 -0700 (PDT) Received: from rafalkozik.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id d79-v6sm745514ljd.50.2018.06.29.03.24.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 29 Jun 2018 03:24:42 -0700 (PDT) From: Rafal Kozik To: dev@dpdk.org Cc: mw@semihalf.com, mk@semihalf.com, gtzalik@amazon.com, evgenys@amazon.com, matua@amazon.com, igorch@amazon.com, thomas@monjalon.net, ferruh.yigit@intel.com, Rafal Kozik Date: Fri, 29 Jun 2018 12:24:32 +0200 Message-Id: <1530267873-7236-4-git-send-email-rk@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1530267873-7236-1-git-send-email-rk@semihalf.com> References: <1530191753-18689-2-git-send-email-rk@semihalf.com> <1530267873-7236-1-git-send-email-rk@semihalf.com> Subject: [dpdk-dev] [PATCH v3 3/4] eal: enable WC during resources mapping X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Write combining (WC) increases NIC performance by making better utilization of PCI bus, but cannot be used by all PMDs. It will be enabled only if RTE_PCI_DRV_WC_ACTIVATE will be set in drivers flags. For proper work also igb_uio driver must be loaded with wc_activate set to 1. When mapping PCI resources, firstly try to us WC. If it is not supported it will fallback to normal mode. Signed-off-by: Rafal Kozik Acked-by: Bruce Richardson --- drivers/bus/pci/linux/pci_uio.c | 44 ++++++++++++++++++++++++++++++----------- drivers/bus/pci/rte_bus_pci.h | 2 ++ 2 files changed, 34 insertions(+), 12 deletions(-) diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c index d423e4b..fb02f0a 100644 --- a/drivers/bus/pci/linux/pci_uio.c +++ b/drivers/bus/pci/linux/pci_uio.c @@ -282,22 +282,19 @@ int pci_uio_map_resource_by_index(struct rte_pci_device *dev, int res_idx, struct mapped_pci_resource *uio_res, int map_idx) { - int fd; + int fd = -1; char devname[PATH_MAX]; void *mapaddr; struct rte_pci_addr *loc; struct pci_map *maps; + int wc_activate = 0; + + if (dev->driver != NULL) + wc_activate = dev->driver->drv_flags & RTE_PCI_DRV_WC_ACTIVATE; loc = &dev->addr; maps = uio_res->maps; - /* update devname for mmap */ - snprintf(devname, sizeof(devname), - "%s/" PCI_PRI_FMT "/resource%d", - rte_pci_get_sysfs_path(), - loc->domain, loc->bus, loc->devid, - loc->function, res_idx); - /* allocate memory to keep path */ maps[map_idx].path = rte_malloc(NULL, strlen(devname) + 1, 0); if (maps[map_idx].path == NULL) { @@ -309,11 +306,34 @@ pci_uio_map_resource_by_index(struct rte_pci_device *dev, int res_idx, /* * open resource file, to mmap it */ - fd = open(devname, O_RDWR); - if (fd < 0) { - RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", + if (wc_activate) { + /* update devname for mmap */ + snprintf(devname, sizeof(devname), + "%s/" PCI_PRI_FMT "/resource%d_wc", + rte_pci_get_sysfs_path(), + loc->domain, loc->bus, loc->devid, + loc->function, res_idx); + + fd = open(devname, O_RDWR); + if (fd >= 0) + RTE_LOG(INFO, EAL, "%s mapped\n", devname); + } + + if (!wc_activate || fd < 0) { + snprintf(devname, sizeof(devname), + "%s/" PCI_PRI_FMT "/resource%d", + rte_pci_get_sysfs_path(), + loc->domain, loc->bus, loc->devid, + loc->function, res_idx); + + /* then try to map resource file */ + fd = open(devname, O_RDWR); + if (fd < 0) { + RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", devname, strerror(errno)); - goto error; + goto error; + } + RTE_LOG(INFO, EAL, "%s mapped\n", devname); } /* try mapping somewhere close to the end of hugepages */ diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h index 458e6d0..828acc5 100644 --- a/drivers/bus/pci/rte_bus_pci.h +++ b/drivers/bus/pci/rte_bus_pci.h @@ -135,6 +135,8 @@ struct rte_pci_bus { /** Device needs PCI BAR mapping (done with either IGB_UIO or VFIO) */ #define RTE_PCI_DRV_NEED_MAPPING 0x0001 +/** Device needs PCI BAR mapping with enabled write combining (wc) */ +#define RTE_PCI_DRV_WC_ACTIVATE 0x0002 /** Device driver supports link state interrupt */ #define RTE_PCI_DRV_INTR_LSC 0x0008 /** Device driver supports device removal interrupt */