From patchwork Sat Apr 28 03:03:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tonghao Zhang X-Patchwork-Id: 39156 X-Patchwork-Delegate: helin.zhang@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DE0F3726F; Sat, 28 Apr 2018 05:04:01 +0200 (CEST) Received: from mail-pf0-f196.google.com (mail-pf0-f196.google.com [209.85.192.196]) by dpdk.org (Postfix) with ESMTP id 28C416CC8 for ; Sat, 28 Apr 2018 05:03:57 +0200 (CEST) Received: by mail-pf0-f196.google.com with SMTP id g14so2791622pfh.3 for ; Fri, 27 Apr 2018 20:03:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XUyNVQEiIBKxa1QhlLmOzJZzNaeUqFZEazrrV2//5Lc=; b=gEhzrhkNMN9h5+OhsTFQkO2ZZp46pBVdG7V/hheiGmcedFfBwd+onIOpJcIvoztvOX 7GOqu9dA7ieYrnnzNpL9CJ8Z1QBSTdAfKKcwOcx4DHCLM6h4r8+afTf1K/c1htC1MymG iU9MqChYuPn+JGsislaKXuEnr+fF58F2CEaFIj2plLvHRljyRXLLJCrXn+Faijmw+E3H Fhd7XKw2313ZqotzEXuq6FM6AchWKWUl/pM1akpdVxNenD2W47T6jv+il/9kN1UzwC/+ nGXzeRoJ3BJiQZIXlUdHQqq4Q70lU5lzKG0hVeSuZ9k+pIeShAPsvxPErSnH1EOImyvN Y2rw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XUyNVQEiIBKxa1QhlLmOzJZzNaeUqFZEazrrV2//5Lc=; b=QO6Hf0n91okpXY5U9+mHIQb2kFSnFkJD8s6GmUMVB/ph1KLZnGLkjeDS8BxzXoaykl W5SZ6xAKqW5uAQ8IQcCMs5D5In1pcXcVhiKZcP/LbJiqhmWiKgpzH8ZMFIRl897etjsM WDKZCv9nrTzOl7sUXHCbTmj1+eeJO+knKuZx121d/W/eadsEUrUCbm1ZKNLNE8c9v4X3 bdXTbTIwJxlhkI49nctABDDxWpdXVdvCYIYGj4gdt3uzOmPHATcFXexi4q8vgJlYIcRB bOF1oVaCoQp0NVFgtLTIviTicQ59CZxJvt5rYygBJVH3lw2ZIAaTHfjtpAMDZwGYaCmI 3dig== X-Gm-Message-State: ALQs6tBl/OkD4XcY16Rg4UZAYYNjjsK90G6S+9wjEXcCH1XQf5u5J/8Z mi5zZdHEtaCK2V4n+L1WHPLRicRE X-Google-Smtp-Source: AB8JxZpamaaCW7JlDaJ2piy7u5Yckd3MG9Q8BL3T9//xjY3JbSzGBaHIvSNaA+Rl4cORCn1hjg6bXA== X-Received: by 2002:a17:902:6e8f:: with SMTP id v15-v6mr4570328plk.245.1524884636457; Fri, 27 Apr 2018 20:03:56 -0700 (PDT) Received: from local.opencloud.tech.localdomain ([13.94.31.177]) by smtp.gmail.com with ESMTPSA id n17-v6sm4634416pgd.58.2018.04.27.20.03.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Apr 2018 20:03:56 -0700 (PDT) From: xiangxia.m.yue@gmail.com To: qi.z.zhang@intel.com, ferruh.yigit@intel.com, helin.zhang@intel.com, beilei.xing@intel.com, wei.dai@intel.com Cc: dev@dpdk.org, Tonghao Zhang Date: Fri, 27 Apr 2018 20:03:38 -0700 Message-Id: <1524884620-64598-3-git-send-email-xiangxia.m.yue@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1524884620-64598-1-git-send-email-xiangxia.m.yue@gmail.com> References: <1524884620-64598-1-git-send-email-xiangxia.m.yue@gmail.com> Subject: [dpdk-dev] [PATCH net-next v4 2/4] net/ixgbe: set the default value for EITR X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Tonghao Zhang The ixgbe PF and VF use the same default value for EITR defined in header file. Signed-off-by: Tonghao Zhang --- drivers/net/ixgbe/ixgbe_ethdev.c | 5 +---- drivers/net/ixgbe/ixgbe_rxtx.c | 3 ++- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index bdede8b..fcc10f6 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -59,9 +59,6 @@ */ #define IXGBE_FC_LO 0x40 -/* Default minimum inter-interrupt interval for EITR configuration */ -#define IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT 0x79E - /* Timer value included in XOFF frames. */ #define IXGBE_FC_PAUSE 0x680 @@ -5879,7 +5876,7 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) break; } IXGBE_WRITE_REG(hw, IXGBE_EITR(IXGBE_MISC_VEC_ID), - IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT & 0xFFF); + IXGBE_EITR_INTERVAL_US(IXGBE_QUEUE_ITR_INTERVAL_DEFAULT)); /* set up to autoclear timer, and the vectors */ mask = IXGBE_EIMS_ENABLE_MASK; diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index 2892436..ce19358 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -4842,7 +4842,8 @@ void __attribute__((cold)) * at most 500us latency for a single RSC aggregation. */ eitr &= ~IXGBE_EITR_ITR_INT_MASK; - eitr |= IXGBE_EITR_INTERVAL_US(500) | IXGBE_EITR_CNT_WDIS; + eitr |= IXGBE_EITR_INTERVAL_US(IXGBE_QUEUE_ITR_INTERVAL_DEFAULT); + eitr |= IXGBE_EITR_CNT_WDIS; IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxq->reg_idx), srrctl); IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(rxq->reg_idx), rscctl);