From patchwork Mon Mar 12 04:17:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zijie Pan X-Patchwork-Id: 36063 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 147E1AACA; Tue, 13 Mar 2018 13:56:01 +0100 (CET) Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by dpdk.org (Postfix) with ESMTP id 092471F1C for ; Mon, 12 Mar 2018 05:18:02 +0100 (CET) Received: by mail-wm0-f68.google.com with SMTP id w128so13788009wmw.0 for ; Sun, 11 Mar 2018 21:18:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:subject:date:message-id:in-reply-to:references; bh=BI6LnABTFrc1jbK5N2uOo848Fs2e3LDyYEhAX7BfklI=; b=NiVchcm8GwA9yNbOM/8ARY8d4Unwl26IzzmCOUhSCM78UFrZW8p4xTNaw6EjPFC3nU AzTrRAO/MUFi7WxTTvsX0t8caqrmFHYWBhpLDF7D8cFIUPbqW8kFt2+sqsTUJ1T1AEml a3/m49Ap5jXieEsW4k1ncVt6twOL3l+64DzXtlix6CMLhy2dZAXioQf5r5D2Q3akbkwW ZSQts+gWSPi1+2amBjAuUk+XQrb58M7ziQxTHMOIbJSS3A4NB13c0AeXxKDYAnzGoYES n5iCyaINvai9eJOBMIF2XxBX9iG+Kx+SHUSfsncmiOpga6KNuU+s/SFBkonZIBShSo5i 75bQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=BI6LnABTFrc1jbK5N2uOo848Fs2e3LDyYEhAX7BfklI=; b=YbxHnz984mLWt17h5LS748o3Oj1UMC0Ctqtf2cGpSOo67Y8/5qRWtRA2s7BPtTalVX sPnIvN3nI8JfR9xPqqUEqziI6RY/T3wpWqVU2cCxKfMXdZCND4ykUQN4bjdz04x2L8wq WAAR55t4WFgxWxDhCYCHW3dck8jG80LPLSTBWO0Y//84b03mConQu1AaNocLmr60rKtS ddBsqLE9AgUFYryX+43g9V7aYB2LupJl9wsqPoDv8ZdFnABZQjrUzVNlKdhvU+ksir/B dbYg8sNzrQ/4ENxui+c6CfNkhZZW6YP4TeJA5UqkhcMDYtxZ9cxO79X4RzazRdPXqV5F xJBQ== X-Gm-Message-State: AElRT7G9E2VwsXSJZRjJydVAJlhShaF0s2Mhd5AbOcSw9KQWiXZ7T7x/ HImryTscGI980+02KN3QkuT2eVamMrt5XA== X-Google-Smtp-Source: AG47ELsbkT8/m+rpL2Qsob44UfuCTctc2LvpFYMAVXyl1U4MzC828c6L2VVAUaAcxMeeYTg7VZByqQ== X-Received: by 10.28.146.19 with SMTP id u19mr4208479wmd.67.1520828281520; Sun, 11 Mar 2018 21:18:01 -0700 (PDT) Received: from cougar.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t91sm13113866wrc.21.2018.03.11.21.18.00 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 11 Mar 2018 21:18:01 -0700 (PDT) From: Zijie Pan To: dev@dpdk.org Date: Mon, 12 Mar 2018 05:17:23 +0100 Message-Id: <1520828243-25191-6-git-send-email-zijie.pan@6wind.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1520828243-25191-1-git-send-email-zijie.pan@6wind.com> References: <1520828243-25191-1-git-send-email-zijie.pan@6wind.com> X-Mailman-Approved-At: Tue, 13 Mar 2018 13:55:53 +0100 Subject: [dpdk-dev] [PATCH 5/5] net/i40e: add module EEPROM callbacks for i40e X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add new callbacks for eth_dev_ops of i40e to get the information and data of plugin module eeprom. Signed-off-by: Zijie Pan --- drivers/net/i40e/i40e_ethdev.c | 141 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 141 insertions(+) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 508b417..6f09fc9 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -369,6 +369,11 @@ static int i40e_get_regs(struct rte_eth_dev *dev, static int i40e_get_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom); +static int i40e_get_module_info(struct rte_eth_dev *dev, + struct rte_dev_module_info *modinfo); +static int i40e_get_module_eeprom(struct rte_eth_dev *dev, + struct rte_dev_eeprom_info *info); + static void i40e_set_default_mac_addr(struct rte_eth_dev *dev, struct ether_addr *mac_addr); @@ -489,6 +494,8 @@ static int i40e_sw_tunnel_filter_insert(struct i40e_pf *pf, .get_reg = i40e_get_regs, .get_eeprom_length = i40e_get_eeprom_length, .get_eeprom = i40e_get_eeprom, + .get_module_info = i40e_get_module_info, + .get_module_eeprom = i40e_get_module_eeprom, .mac_addr_set = i40e_set_default_mac_addr, .mtu_set = i40e_dev_mtu_set, .tm_ops_get = i40e_tm_ops_get, @@ -11249,6 +11256,140 @@ static int i40e_get_eeprom(struct rte_eth_dev *dev, return 0; } +static int i40e_get_module_info(struct rte_eth_dev *dev, + struct rte_dev_module_info *modinfo) +{ + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t sff8472_comp = 0; + uint32_t sff8472_swap = 0; + uint32_t sff8636_rev = 0; + i40e_status status; + uint32_t type = 0; + + /* Check if firmware supports reading module EEPROM. */ + if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { + PMD_DRV_LOG(ERR, "Module EEPROM memory read not supported. Please update the NVM image.\n"); + return -EINVAL; + } + + status = i40e_update_link_info(hw); + if (status) + return -EIO; + + if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { + PMD_DRV_LOG(ERR, "Cannot read module EEPROM memory. No module connected.\n"); + return -EINVAL; + } + + type = hw->phy.link_info.module_type[0]; + + switch (type) { + case I40E_MODULE_TYPE_SFP: + status = i40e_aq_get_phy_register(hw, + I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, + I40E_I2C_EEPROM_DEV_ADDR, + I40E_MODULE_SFF_8472_COMP, + &sff8472_comp, NULL); + if (status) + return -EIO; + + status = i40e_aq_get_phy_register(hw, + I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, + I40E_I2C_EEPROM_DEV_ADDR, + I40E_MODULE_SFF_8472_SWAP, + &sff8472_swap, NULL); + if (status) + return -EIO; + + /* Check if the module requires address swap to access + * the other EEPROM memory page. + */ + if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { + PMD_DRV_LOG(WARNING, "Module address swap to access page 0xA2 is not supported.\n"); + modinfo->type = ETH_MODULE_SFF_8079; + modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; + } else if (sff8472_comp == 0x00) { + /* Module is not SFF-8472 compliant */ + modinfo->type = ETH_MODULE_SFF_8079; + modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; + } else { + modinfo->type = ETH_MODULE_SFF_8472; + modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; + } + break; + case I40E_MODULE_TYPE_QSFP_PLUS: + /* Read from memory page 0. */ + status = i40e_aq_get_phy_register(hw, + I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, + 0, + I40E_MODULE_REVISION_ADDR, + &sff8636_rev, NULL); + if (status) + return -EIO; + /* Determine revision compliance byte */ + if (sff8636_rev > 0x02) { + /* Module is SFF-8636 compliant */ + modinfo->type = ETH_MODULE_SFF_8636; + modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; + } else { + modinfo->type = ETH_MODULE_SFF_8436; + modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; + } + break; + case I40E_MODULE_TYPE_QSFP28: + modinfo->type = ETH_MODULE_SFF_8636; + modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; + break; + default: + PMD_DRV_LOG(ERR, "Module type unrecognized\n"); + return -EINVAL; + } + return 0; +} + +static int i40e_get_module_eeprom(struct rte_eth_dev *dev, + struct rte_dev_eeprom_info *info) +{ + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); + bool is_sfp = false; + i40e_status status; + uint8_t *data = info->data; + uint32_t value = 0; + uint32_t i; + + if (!info || !info->length || !data) + return -EINVAL; + + if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) + is_sfp = true; + + for (i = 0; i < info->length; i++) { + u32 offset = i + info->offset; + u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; + + /* Check if we need to access the other memory page */ + if (is_sfp) { + if (offset >= ETH_MODULE_SFF_8079_LEN) { + offset -= ETH_MODULE_SFF_8079_LEN; + addr = I40E_I2C_EEPROM_DEV_ADDR2; + } + } else { + while (offset >= ETH_MODULE_SFF_8436_LEN) { + /* Compute memory page number and offset. */ + offset -= ETH_MODULE_SFF_8436_LEN / 2; + addr++; + } + } + status = i40e_aq_get_phy_register(hw, + I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, + addr, offset, &value, NULL); + if (status) + return -EIO; + data[i] = (uint8_t)value; + } + return 0; +} + static void i40e_set_default_mac_addr(struct rte_eth_dev *dev, struct ether_addr *mac_addr) {