From patchwork Thu Jan 11 16:39:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tonghao Zhang X-Patchwork-Id: 33604 X-Patchwork-Delegate: helin.zhang@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D06F0A495; Thu, 11 Jan 2018 17:40:08 +0100 (CET) Received: from mail-pf0-f195.google.com (mail-pf0-f195.google.com [209.85.192.195]) by dpdk.org (Postfix) with ESMTP id 25689A491 for ; Thu, 11 Jan 2018 17:40:06 +0100 (CET) Received: by mail-pf0-f195.google.com with SMTP id 23so2036936pfp.3 for ; Thu, 11 Jan 2018 08:40:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1xB2gLMCSvUtq0lOpbmmmza4x743er/Jx/UU4DaTsag=; b=pgxyXrseiEPI3sNLGhECXDtZt3lWCl4ojdGG8Vpt//xguseCM3RqDZ4FcwIDj2hnZn 4heYSD87sE6yfhVVd5nR9dHZF6erOtsDbWwbh6a0AwpUwWJLPTLY1d2sq0icEJMSe5Nb lZfbYEu6qm6AgHSGzRhaZ81CfjCSFVXm4CV5eHNIuSemtoNRpxFqQ2JSJaKqqxgOCJGv Fd+p9bJeCFP5TLYVEGITJmoHU7IqOLiTmSLafT6ut+x087pBLQLWUQOUK4Q7+Aq0+iVo 5Y7vGbkG4nqbHVM/czju80R9IBb/mudzWvcMdZkFBNyhJWeA4uYNCdaVVGovqiNQN/IE FNhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1xB2gLMCSvUtq0lOpbmmmza4x743er/Jx/UU4DaTsag=; b=txYLzFwsGjG4LvjkBJGqqMP5k1PcHCyWrwAth8xhVEXhkCe3tyb5n2xmqhle37gRnL z+2KHGFPm6TvQGdi+3GYFu5BOeDSu74Qwz/c9ecqUQkm5qmIyjSxLF+CJX0JsR7QoaQo mTBaCU43/n6n/IDnsTofWFz+E7FyaEXX3k5v+9wNVAp3bWoQopZ7ehqzV0cXuKW3kQjt wXxPdZ5qyLftY9epVPhlUFY+NQqs971R5TsNZcHnF5Td7qV8HP0Eh6th/s60ddzJyppf pWRFtWZ2f9lk1mO78qCuvDJ6YS16ZRHUeSQ0Z/3Gn46pi0lVi/CmXFTk3ZdoyLhInAqk dXpw== X-Gm-Message-State: AKwxyteCQTzIlWpFbevUBMLzmWDn9DBdhThcnSXvBwLHr8Ly3joOhNfp 2tekfYLRsDGxpsy02FaaNqs= X-Google-Smtp-Source: ACJfBouqxohyvXFSqSLyfOF/TO7AoeKebBYvzn+u8WLCmkqEMUnWpH4pimxqQpFfUHkJo3ucPDVUiA== X-Received: by 10.99.55.67 with SMTP id g3mr4172554pgn.163.1515688805466; Thu, 11 Jan 2018 08:40:05 -0800 (PST) Received: from local.opencloud.tech.localdomain ([183.240.196.57]) by smtp.gmail.com with ESMTPSA id w21sm40940126pfl.50.2018.01.11.08.40.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Jan 2018 08:40:05 -0800 (PST) From: xiangxia.m.yue@gmail.com To: beilei.xing@intel.com, dev@dpdk.org Cc: Tonghao Zhang Date: Thu, 11 Jan 2018 08:39:51 -0800 Message-Id: <1515688791-2794-4-git-send-email-xiangxia.m.yue@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1515688791-2794-1-git-send-email-xiangxia.m.yue@gmail.com> References: <1515688791-2794-1-git-send-email-xiangxia.m.yue@gmail.com> Subject: [dpdk-dev] [PATCH v2 4/4] net/ixgbe: remove the unnecessary call rte_intr_enable. X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Tonghao Zhang When binding the ixgbe pf or vf to vfio and call the rte_eth_dev_rx_intr_enable frequently, the interrupt setting (msi_set_mask_bit) will take more CPU as show below. rte_intr_enable calls the ioctl to map the fd to interrupts frequently. perf top: 5.45% [kernel] [k] msi_set_mask_bit It is unnecessary to call the rte_intr_enable in ixgbe_dev_rx_queue_intr_enable. Because the fds has been mapped to interrupt and not unmapped in ixgbe_dev_rx_queue_intr_disable. With the patch, msi_set_mask_bit is not listed in perl anymore. Signed-off-by: Tonghao Zhang --- drivers/net/ixgbe/ixgbe_ethdev.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index cab243d..d081247 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -5639,8 +5639,6 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) RTE_SET_USED(queue_id); IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask); - rte_intr_enable(intr_handle); - return 0; } @@ -5688,7 +5686,6 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) mask &= (1 << (queue_id - 32)); IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); } - rte_intr_enable(intr_handle); return 0; }