From patchwork Fri May 12 19:25:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Eads, Gage" X-Patchwork-Id: 24277 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 2CFF2567F; Fri, 12 May 2017 21:25:51 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 1B75C2E83 for ; Fri, 12 May 2017 21:25:49 +0200 (CEST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 May 2017 12:25:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,330,1491289200"; d="scan'208";a="967819747" Received: from txasoft-yocto.an.intel.com (HELO txasoft-yocto.an.intel.com.) ([10.123.72.111]) by orsmga003.jf.intel.com with ESMTP; 12 May 2017 12:25:48 -0700 From: Gage Eads To: dev@dpdk.org Cc: jerin.jacob@caviumnetworks.org Date: Fri, 12 May 2017 14:25:37 -0500 Message-Id: <1494617137-8619-1-git-send-email-gage.eads@intel.com> X-Mailer: git-send-email 2.7.4 Subject: [dpdk-dev] [PATCH] eventdev: clarify atomic and ordered queue config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The nb_atomic_flows and nb_atomic_order_sequences fields are only inspected if the queue is configured for atomic or ordered scheduling, respectively. This commit updates the documentation to reflect that. Signed-off-by: Gage Eads --- lib/librte_eventdev/rte_eventdev.h | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/lib/librte_eventdev/rte_eventdev.h b/lib/librte_eventdev/rte_eventdev.h index 20e7293..32ffcd1 100644 --- a/lib/librte_eventdev/rte_eventdev.h +++ b/lib/librte_eventdev/rte_eventdev.h @@ -521,9 +521,11 @@ rte_event_dev_configure(uint8_t dev_id, struct rte_event_queue_conf { uint32_t nb_atomic_flows; /**< The maximum number of active flows this queue can track at any - * given time. The value must be in the range of - * [1 - nb_event_queue_flows)] which previously provided in - * rte_event_dev_info_get(). + * given time. If the queue is configured for atomic scheduling (by + * applying the RTE_EVENT_QUEUE_CFG_ALL_TYPES or + * RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY flags to event_queue_cfg), then the + * value must be in the range of [1 - nb_event_queue_flows)], which was + * previously provided in rte_event_dev_configure(). */ uint32_t nb_atomic_order_sequences; /**< The maximum number of outstanding events waiting to be @@ -533,8 +535,11 @@ struct rte_event_queue_conf { * scheduler cannot schedule the events from this queue and invalid * event will be returned from dequeue until one or more entries are * freed up/released. - * The value must be in the range of [1 - nb_event_queue_flows)] - * which previously supplied to rte_event_dev_configure(). + * If the queue is configured for ordered scheduling (by applying the + * RTE_EVENT_QUEUE_CFG_ALL_TYPES or RTE_EVENT_QUEUE_CFG_ORDERED_ONLY + * flags to event_queue_cfg), then the value must be in the range of [1 + * - nb_event_queue_flows)], which was previously supplied to + * rte_event_dev_configure(). */ uint32_t event_queue_cfg; /**< Queue cfg flags(EVENT_QUEUE_CFG_) */ uint8_t priority;