From patchwork Fri Dec 2 10:43:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhao1, Wei" X-Patchwork-Id: 17473 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 94FD3FA74; Fri, 2 Dec 2016 11:47:42 +0100 (CET) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id B284068AB for ; Fri, 2 Dec 2016 11:47:03 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP; 02 Dec 2016 02:47:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.33,729,1477983600"; d="scan'208"; a="1067043881" Received: from dpdk1.bj.intel.com ([172.16.182.84]) by orsmga001.jf.intel.com with ESMTP; 02 Dec 2016 02:47:02 -0800 From: Wei Zhao To: dev@dpdk.org Cc: wenzhuo.lu@intel.com, wei zhao1 Date: Fri, 2 Dec 2016 18:43:10 +0800 Message-Id: <1480675394-59179-15-git-send-email-wei.zhao1@intel.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1480675394-59179-1-git-send-email-wei.zhao1@intel.com> References: <1480675394-59179-1-git-send-email-wei.zhao1@intel.com> Subject: [dpdk-dev] [PATCH 14/18] net/ixgbe: parse L2 tunnel filter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: wei zhao1 check if the rule is a L2 tunnel rule, and get the L2 tunnel info. Signed-off-by: wei zhao1 Signed-off-by: Wenzhuo Lu --- drivers/net/ixgbe/ixgbe_ethdev.c | 139 +++++++++++++++++++++++++++++++++++++++ drivers/net/ixgbe/ixgbe_ethdev.h | 22 +++++++ 2 files changed, 161 insertions(+) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 3ed749a..104277d 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -420,6 +420,11 @@ cons_parse_syn_filter(const struct rte_flow_attr *attr, const struct rte_flow_item pattern[], const struct rte_flow_action actions[], struct rte_eth_syn_filter *filter); +static enum rte_flow_error_type +cons_parse_l2_tn_filter(const struct rte_flow_attr *attr, + const struct rte_flow_item pattern[], + const struct rte_flow_action actions[], + struct rte_eth_l2_tunnel_conf *filter); enum rte_flow_error_type ixgbe_flow_rule_validate(__rte_unused struct rte_eth_dev *dev, const struct rte_flow_attr *attr, @@ -8606,6 +8611,136 @@ cons_parse_syn_filter(const struct rte_flow_attr *attr, } /** + * Parse the rule to see if it is a L2 tunnel rule. + * And get the L2 tunnel filter info BTW. + * Only support E-tag now. + */ +static enum rte_flow_error_type +cons_parse_l2_tn_filter(const struct rte_flow_attr *attr, + const struct rte_flow_item pattern[], + const struct rte_flow_action actions[], + struct rte_eth_l2_tunnel_conf *filter) +{ + const struct rte_flow_item *item; + const struct rte_flow_item_e_tag *e_tag_spec; + const struct rte_flow_item_e_tag *e_tag_mask; + const struct rte_flow_action *act; + const struct rte_flow_action_queue *act_q; + uint32_t i, j; + + /************************************************ + * parse pattern + ************************************************/ + i = 0; + + /* The first not void item should be e-tag. */ + PATTERN_SKIP_VOID(filter, struct rte_eth_l2_tunnel_conf, + RTE_FLOW_ERROR_TYPE_ITEM_NUM); + if (item->type != RTE_FLOW_ITEM_TYPE_E_TAG) { + memset(filter, 0, sizeof(struct rte_eth_l2_tunnel_conf)); + return RTE_FLOW_ERROR_TYPE_ITEM; + } + + if (!item->spec || !item->mask) { + memset(filter, 0, sizeof(struct rte_eth_l2_tunnel_conf)); + return RTE_FLOW_ERROR_TYPE_ITEM; + } + + e_tag_spec = (const struct rte_flow_item_e_tag *)item->spec; + e_tag_mask = (const struct rte_flow_item_e_tag *)item->mask; + + /* Src & dst MAC address should be masked. */ + for (j = 0; j < ETHER_ADDR_LEN; j++) { + if (e_tag_mask->src.addr_bytes[j] || + e_tag_mask->dst.addr_bytes[j]) { + memset(filter, 0, + sizeof(struct rte_eth_l2_tunnel_conf)); + return RTE_FLOW_ERROR_TYPE_ITEM; + } + } + + /* Only care about GRP and E cid base. */ + if (e_tag_mask->e_tag_ethertype || + e_tag_mask->e_pcp || + e_tag_mask->dei || + e_tag_mask->in_e_cid_base || + e_tag_mask->in_e_cid_ext || + e_tag_mask->e_cid_ext || + e_tag_mask->type || + e_tag_mask->tags || + e_tag_mask->grp != 0x3 || + e_tag_mask->e_cid_base != 0xFFF) { + memset(filter, 0, sizeof(struct rte_eth_l2_tunnel_conf)); + return RTE_FLOW_ERROR_TYPE_ITEM; + } + + filter->l2_tunnel_type = RTE_L2_TUNNEL_TYPE_E_TAG; + /** + * grp and e_cid_base are bit fields and only use 14 bits. + * e-tag id is taken as little endian by HW. + */ + filter->tunnel_id = e_tag_spec->grp << 12; + filter->tunnel_id |= rte_be_to_cpu_16(e_tag_spec->e_cid_base); + + /* check if the next not void item is END */ + i++; + PATTERN_SKIP_VOID(filter, struct rte_eth_l2_tunnel_conf, + RTE_FLOW_ERROR_TYPE_ITEM); + if (item->type != RTE_FLOW_ITEM_TYPE_END) { + memset(filter, 0, sizeof(struct rte_eth_l2_tunnel_conf)); + return RTE_FLOW_ERROR_TYPE_ITEM; + } + + /************************************************ + * parse attr + ************************************************/ + /* must be input direction */ + if (!attr->ingress) { + memset(filter, 0, sizeof(struct rte_eth_l2_tunnel_conf)); + return RTE_FLOW_ERROR_TYPE_ATTR_INGRESS; + } + + /* not supported */ + if (attr->egress) { + memset(filter, 0, sizeof(struct rte_eth_l2_tunnel_conf)); + return RTE_FLOW_ERROR_TYPE_ATTR_EGRESS; + } + + /* not supported */ + if (attr->priority) { + memset(filter, 0, sizeof(struct rte_eth_l2_tunnel_conf)); + return RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY; + } + + /************************************************ + * parse action + ************************************************/ + i = 0; + + /* check if the first not void action is QUEUE. */ + ACTION_SKIP_VOID(filter, struct rte_eth_l2_tunnel_conf, + RTE_FLOW_ERROR_TYPE_ACTION_NUM); + if (act->type != RTE_FLOW_ACTION_TYPE_QUEUE) { + memset(filter, 0, sizeof(struct rte_eth_l2_tunnel_conf)); + return RTE_FLOW_ERROR_TYPE_ACTION; + } + + act_q = (const struct rte_flow_action_queue *)act->conf; + filter->pool = act_q->index; + + /* check if the next not void item is END */ + i++; + ACTION_SKIP_VOID(filter, struct rte_eth_l2_tunnel_conf, + RTE_FLOW_ERROR_TYPE_ACTION); + if (act->type != RTE_FLOW_ACTION_TYPE_END) { + memset(filter, 0, sizeof(struct rte_eth_l2_tunnel_conf)); + return RTE_FLOW_ERROR_TYPE_ACTION; + } + + return 0; +} + +/** * Check if the flow rule is supported by ixgbe. * It only checkes the format. Don't guarantee the rule can be programmed into * the HW. Because there can be no enough room for the rule. @@ -8620,6 +8755,7 @@ ixgbe_flow_rule_validate(__rte_unused struct rte_eth_dev *dev, struct rte_eth_ntuple_filter ntuple_filter; struct rte_eth_ethertype_filter ethertype_filter; struct rte_eth_syn_filter syn_filter; + struct rte_eth_l2_tunnel_conf l2_tn_filter; memset(&ntuple_filter, 0, sizeof(struct rte_eth_ntuple_filter)); ret = ixgbe_parse_ntuple_filter(attr, pattern, actions, &ntuple_filter); @@ -8637,6 +8773,9 @@ ixgbe_flow_rule_validate(__rte_unused struct rte_eth_dev *dev, if (!ret) return RTE_FLOW_ERROR_TYPE_NONE; + memset(&l2_tn_filter, 0, sizeof(struct rte_eth_l2_tunnel_conf)); + ret = cons_parse_l2_tn_filter(attr, pattern, actions, &l2_tn_filter); + return ret; } diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h index 9ed5f45..4aa5fd5 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.h +++ b/drivers/net/ixgbe/ixgbe_ethdev.h @@ -553,4 +553,26 @@ ixgbe_ethertype_filter_remove(struct ixgbe_filter_info *filter_info, return idx; } +#define RTE_FLOW_ITEM_TYPE_E_TAG 0xF2 + +/* E-tag Header.*/ +struct rte_flow_item_e_tag { + struct ether_addr dst; /**< Destination MAC. */ + struct ether_addr src; /**< Source MAC. */ + uint16_t e_tag_ethertype; /**< E-tag EtherType, 0x893F. */ + uint16_t e_pcp:3; /**< E-PCP */ + uint16_t dei:1; /**< DEI */ + uint16_t in_e_cid_base:12; /**< Ingress E-CID base */ + uint16_t rsv:2; /**< reserved */ + uint16_t grp:2; /**< GRP */ + uint16_t e_cid_base:12; /**< E-CID base */ + uint16_t in_e_cid_ext:8; /**< Ingress E-CID extend */ + uint16_t e_cid_ext:8; /**< E-CID extend */ + uint16_t type; /**< MAC type. */ + unsigned int tags; /**< Number of 802.1Q/ad tags defined. */ + struct { + uint16_t tpid; /**< Tag protocol identifier. */ + uint16_t tci; /**< Tag control information. */ + } tag[]; /**< 802.1Q/ad tag definitions, outermost first. */ +}; #endif /* _IXGBE_ETHDEV_H_ */