From patchwork Fri Dec 2 00:12:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenzhuo Lu X-Patchwork-Id: 17448 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 60B5AFAC0; Fri, 2 Dec 2016 09:22:23 +0100 (CET) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 83C8BFA3B for ; Fri, 2 Dec 2016 09:21:43 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP; 02 Dec 2016 00:21:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.33,285,1477983600"; d="scan'208"; a="1067004208" Received: from dpdk26.sh.intel.com ([10.239.128.228]) by orsmga001.jf.intel.com with ESMTP; 02 Dec 2016 00:21:42 -0800 From: Wenzhuo Lu To: dev@dpdk.org Cc: "Chen Jing D(Mark)" Date: Thu, 1 Dec 2016 19:12:11 -0500 Message-Id: <1480637533-37425-30-git-send-email-wenzhuo.lu@intel.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1480637533-37425-1-git-send-email-wenzhuo.lu@intel.com> References: <1480637533-37425-1-git-send-email-wenzhuo.lu@intel.com> Subject: [dpdk-dev] [PATCH 29/31] net/i40e: parse more VF parameter and configure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When VF requested to configure TX queue, a few parameters are missed to be configured in PF host. This change have more fields parsed and configured for TX context. Signed-off-by: Chen Jing D(Mark) --- drivers/net/i40e/i40e_pf.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/i40e/i40e_pf.c b/drivers/net/i40e/i40e_pf.c index 8319c2c..1ad5ed1 100644 --- a/drivers/net/i40e/i40e_pf.c +++ b/drivers/net/i40e/i40e_pf.c @@ -422,10 +422,12 @@ /* clear the context structure first */ memset(&tx_ctx, 0, sizeof(tx_ctx)); - tx_ctx.new_context = 1; tx_ctx.base = txq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT; tx_ctx.qlen = txq->ring_len; tx_ctx.rdylist = rte_le_to_cpu_16(vf->vsi->info.qs_handle[0]); + tx_ctx.head_wb_ena = txq->headwb_enabled; + tx_ctx.head_wb_addr = txq->dma_headwb_addr; + err = i40e_clear_lan_tx_queue_context(hw, abs_queue_id); if (err != I40E_SUCCESS) return err;