diff --git a/drivers/net/ixgbe/base/ixgbe_phy.c b/drivers/net/ixgbe/base/ixgbe_phy.c
index 297a335..d33d0f8 100644
--- a/drivers/net/ixgbe/base/ixgbe_phy.c
+++ b/drivers/net/ixgbe/base/ixgbe_phy.c
@@ -335,25 +335,33 @@ s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)
 			hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM;
 	}
 
-	if (hw->phy.type == ixgbe_phy_unknown) {
-		for (phy_addr = 0; phy_addr < IXGBE_MAX_PHY_ADDR; phy_addr++) {
-		if (ixgbe_probe_phy(hw, phy_addr)) {
-				status = IXGBE_SUCCESS;
-				break;
-			}
-		}
+	if (hw->phy.type != ixgbe_phy_unknown)
+		return IXGBE_SUCCESS;
 
-		/* Certain media types do not have a phy so an address will not
-		 * be found and the code will take this path.  Caller has to
-		 * decide if it is an error or not.
-		 */
-		if (status != IXGBE_SUCCESS) {
-			hw->phy.addr = 0;
+	if (hw->phy.nw_mng_if_sel) {
+		phy_addr = (hw->phy.nw_mng_if_sel &
+			    IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD) >>
+			   IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT;
+		if (ixgbe_probe_phy(hw, phy_addr))
+			return IXGBE_SUCCESS;
+		else
+			return IXGBE_ERR_PHY_ADDR_INVALID;
+	}
+
+	for (phy_addr = 0; phy_addr < IXGBE_MAX_PHY_ADDR; phy_addr++) {
+		if (ixgbe_probe_phy(hw, phy_addr)) {
+			status = IXGBE_SUCCESS;
+			break;
 		}
-	} else {
-		status = IXGBE_SUCCESS;
 	}
 
+	/* Certain media types do not have a phy so an address will not
+	 * be found and the code will take this path.  Caller has to
+	 * decide if it is an error or not.
+	 */
+	if (status != IXGBE_SUCCESS)
+		hw->phy.addr = 0;
+
 	return status;
 }
 
@@ -464,9 +472,11 @@ enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id)
 		phy_type = ixgbe_phy_nl;
 		break;
 	case X557_PHY_ID:
+	case X557_PHY_ID2:
 		phy_type = ixgbe_phy_x550em_ext_t;
 		break;
 	case IXGBE_M88E1500_E_PHY_ID:
+	case IXGBE_M88E1543_E_PHY_ID:
 		phy_type = ixgbe_phy_m88;
 		break;
 	default:
@@ -894,6 +904,9 @@ s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
 	if (speed & IXGBE_LINK_SPEED_100_FULL)
 		hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL;
 
+	if (speed & IXGBE_LINK_SPEED_10_FULL)
+		hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10_FULL;
+
 	/* Setup link based on the new speed settings */
 	ixgbe_setup_phy_link(hw);
 
diff --git a/drivers/net/ixgbe/base/ixgbe_phy.h b/drivers/net/ixgbe/base/ixgbe_phy.h
index 281f9fa..da14abc 100644
--- a/drivers/net/ixgbe/base/ixgbe_phy.h
+++ b/drivers/net/ixgbe/base/ixgbe_phy.h
@@ -92,8 +92,8 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_CS4227_GLOBAL_ID_MSB	1
 #define IXGBE_CS4227_SCRATCH		2
 #define IXGBE_CS4227_GLOBAL_ID_VALUE	0x03E5
-#define IXGBE_CS4223_PHY_ID		0x7003/* Quad port */
-#define IXGBE_CS4227_PHY_ID		0x3003/* Dual port */
+#define IXGBE_CS4223_PHY_ID		0x7003	/* Quad port */
+#define IXGBE_CS4227_PHY_ID		0x3003	/* Dual port */
 #define IXGBE_CS4227_RESET_PENDING	0x1357
 #define IXGBE_CS4227_RESET_COMPLETE	0x5AA5
 #define IXGBE_CS4227_RETRIES		15
@@ -154,6 +154,73 @@ POSSIBILITY OF SUCH DAMAGE.
 /* SFP+ SFF-8472 Compliance */
 #define IXGBE_SFF_SFF_8472_UNSUP	0x00
 
+/* More phy definitions */
+#define IXGBE_M88E1500_COPPER_CTRL		0	/* Page 0 reg */
+#define IXGBE_M88E1500_COPPER_CTRL_RESET	(1u << 15)
+#define IXGBE_M88E1500_COPPER_CTRL_AN_EN	(1u << 12)
+#define IXGBE_M88E1500_COPPER_CTRL_POWER_DOWN	(1u << 11)
+#define IXGBE_M88E1500_COPPER_CTRL_RESTART_AN	(1u << 9)
+#define IXGBE_M88E1500_COPPER_CTRL_FULL_DUPLEX	(1u << 8)
+#define IXGBE_M88E1500_COPPER_CTRL_SPEED_MSB	(1u << 6)
+#define IXGBE_M88E1500_COPPER_STATUS		1	/* Page 0 reg */
+#define IXGBE_M88E1500_COPPER_STATUS_AN_DONE	(1u << 5)
+#define IXGBE_M88E1500_COPPER_AN		4	/* Page 0 reg */
+#define IXGBE_M88E1500_COPPER_AN_AS_PAUSE	(1u << 11)
+#define IXGBE_M88E1500_COPPER_AN_PAUSE		(1u << 10)
+#define IXGBE_M88E1500_COPPER_AN_T4		(1u << 9)
+#define IXGBE_M88E1500_COPPER_AN_100TX_FD	(1u << 8)
+#define IXGBE_M88E1500_COPPER_AN_100TX_HD	(1u << 7)
+#define IXGBE_M88E1500_COPPER_AN_10TX_FD	(1u << 6)
+#define IXGBE_M88E1500_COPPER_AN_10TX_HD	(1u << 5)
+#define IXGBE_M88E1500_COPPER_AN_LP_ABILITY	5	/* Page 0 reg */
+#define IXGBE_M88E1500_COPPER_AN_LP_AS_PAUSE	(1u << 11)
+#define IXGBE_M88E1500_COPPER_AN_LP_PAUSE	(1u << 10)
+#define IXGBE_M88E1500_1000T_CTRL		9	/* Page 0 reg */
+/* 1=Configure PHY as Master 0=Configure PHY as Slave */
+#define IXGBE_M88E1500_1000T_CTRL_MS_VALUE	(1u << 11)
+#define IXGBE_M88E1500_1000T_CTRL_1G_FD		(1u << 9)
+/* 1=Master/Slave manual config value 0=Automatic Master/Slave config */
+#define IXGBE_M88E1500_1000T_CTRL_MS_ENABLE	(1u << 12)
+#define IXGBE_M88E1500_1000T_CTRL_FULL_DUPLEX	(1u << 9)
+#define IXGBE_M88E1500_1000T_CTRL_HALF_DUPLEX	(1u << 8)
+#define IXGBE_M88E1500_1000T_STATUS		10	/* Page 0 reg */
+#define IXGBE_M88E1500_AUTO_COPPER_SGMII	0x2
+#define IXGBE_M88E1500_AUTO_COPPER_BASEX	0x3
+#define IXGBE_M88E1500_STATUS_LINK		(1u << 2) /* Interface Link Bit */
+#define IXGBE_M88E1500_MAC_CTRL_1		16	/* Page 0 reg */
+#define IXGBE_M88E1500_MAC_CTRL_1_MODE_MASK	0x0380 /* Mode Select */
+#define IXGBE_M88E1500_MAC_CTRL_1_DWN_SHIFT	12
+#define IXGBE_M88E1500_MAC_CTRL_1_DWN_4X	3u
+#define IXGBE_M88E1500_MAC_CTRL_1_ED_SHIFT	8
+#define IXGBE_M88E1500_MAC_CTRL_1_ED_TM		3u
+#define IXGBE_M88E1500_MAC_CTRL_1_MDIX_SHIFT	5
+#define IXGBE_M88E1500_MAC_CTRL_1_MDIX_AUTO	3u
+#define IXGBE_M88E1500_MAC_CTRL_1_POWER_DOWN	(1u << 2)
+#define IXGBE_M88E1500_PHY_SPEC_STATUS		17	/* Page 0 reg */
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_SHIFT	14
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_MASK	3u
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_10		0u
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_100	1u
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_1000	2u
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_DUPLEX		(1u << 13)
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_RESOLVED		(1u << 11)
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_LINK		(1u << 10)
+#define IXGBE_M88E1500_PAGE_ADDR		22	/* All pages reg */
+#define IXGBE_M88E1500_FIBER_CTRL		0	/* Page 1 reg */
+#define IXGBE_M88E1500_FIBER_CTRL_RESET		(1u << 15)
+#define IXGBE_M88E1500_FIBER_CTRL_SPEED_LSB	(1u << 13)
+#define IXGBE_M88E1500_FIBER_CTRL_AN_EN		(1u << 12)
+#define IXGBE_M88E1500_FIBER_CTRL_POWER_DOWN	(1u << 11)
+#define IXGBE_M88E1500_FIBER_CTRL_DUPLEX_FULL	(1u << 8)
+#define IXGBE_M88E1500_FIBER_CTRL_SPEED_MSB	(1u << 6)
+#define IXGBE_M88E1500_MAC_SPEC_CTRL		16	/* Page 2 reg */
+#define IXGBE_M88E1500_MAC_SPEC_CTRL_POWER_DOWN	(1u << 3)
+#define IXGBE_M88E1500_EEE_CTRL_1		0	/* Page 18 reg */
+#define IXGBE_M88E1500_EEE_CTRL_1_MS		(1u << 0) /* EEE Master/Slave */
+#define IXGBE_M88E1500_GEN_CTRL			20	/* Page 18 reg */
+#define IXGBE_M88E1500_GEN_CTRL_RESET		(1u << 15)
+#define IXGBE_M88E1500_GEN_CTRL_MODE_SGMII_COPPER	1u /* Mode bits 0-2 */
+
 s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
 bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr);
 enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id);
diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 96b5cbd..39099d6 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -1644,13 +1644,14 @@ struct ixgbe_dmac_config {
 #define X550_PHY_ID2	0x01540223
 #define X550_PHY_ID3	0x01540221
 #define X557_PHY_ID	0x01540240
+#define X557_PHY_ID2	0x01540250
 #define AQ_FW_REV	0x20
 #define QT2022_PHY_ID	0x0043A400
 #define ATH_PHY_ID	0x03429050
 
 /* PHY Types */
-#define IXGBE_M88E1500_E_PHY_ID		0x01410DD0
-#define IXGBE_M88E1543_E_PHY_ID		0x01410EA0
+#define IXGBE_M88E1500_E_PHY_ID	0x01410DD0
+#define IXGBE_M88E1543_E_PHY_ID	0x01410EA0
 
 /* Special PHY Init Routine */
 #define IXGBE_PHY_INIT_OFFSET_NL	0x002B
@@ -3054,7 +3055,7 @@ enum ixgbe_fdir_pballoc_type {
 #ifdef C99
 #pragma pack(push, 1)
 #else
-#pragma pack(1)
+#pragma pack (1)
 #endif /* C99 */
 
 struct ixgbe_hic_hdr {
@@ -4170,6 +4171,7 @@ struct ixgbe_hw {
 
 #define IXGBE_KRM_AN_CNTL_8_LINEAR			(1 << 0)
 #define IXGBE_KRM_AN_CNTL_8_LIMITING			(1 << 1)
+
 #define IXGBE_KRM_LP_BASE_PAGE_HIGH_SYM_PAUSE		(1 << 10)
 #define IXGBE_KRM_LP_BASE_PAGE_HIGH_ASM_PAUSE		(1 << 11)
 
@@ -4208,11 +4210,13 @@ struct ixgbe_hw {
 #define IXGBE_SB_IOSF_TARGET_KR_PHY	0
 
 #define IXGBE_NW_MNG_IF_SEL		0x00011178
-#define IXGBE_NW_MNG_IF_SEL_MDIO_ACT	(1 << 1)
+#define IXGBE_NW_MNG_IF_SEL_MDIO_ACT	(1u << 1)
+#define IXGBE_NW_MNG_IF_SEL_MDIO_IF_MODE	(1u << 2)
+#define IXGBE_NW_MNG_IF_SEL_EN_SHARED_MDIO	(1u << 13)
 #define IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M (1 << 23)
 #define IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE (1 << 24)
 #define IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT 3
 #define IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD	\
-		(0x1F << IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT)
+				(0x1F << IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT)
 
 #endif /* _IXGBE_TYPE_H_ */
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index db12339..0de9238 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -342,11 +342,10 @@ STATIC s32 ixgbe_read_phy_reg_mdi_22(struct ixgbe_hw *hw, u32 reg_addr,
 	UNREFERENCED_1PARAMETER(dev_type);
 
 	/* Setup and write the read command */
-	command = (reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT)  |
-		(reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) |
-		(hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) |
-		IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_READ |
-		IXGBE_MSCA_MDI_COMMAND;
+	command = (reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) |
+		  (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) |
+		  IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_READ_AUTOINC |
+		  IXGBE_MSCA_MDI_COMMAND;
 
 	IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
 
@@ -393,11 +392,10 @@ STATIC s32 ixgbe_write_phy_reg_mdi_22(struct ixgbe_hw *hw, u32 reg_addr,
 	IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);
 
 	/* Setup and write the write command */
-	command = (reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT)  |
-		(reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) |
-		(hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) |
-		IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_WRITE |
-		IXGBE_MSCA_MDI_COMMAND;
+	command = (reg_addr << IXGBE_MSCA_DEV_TYPE_SHIFT) |
+		  (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) |
+		  IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_WRITE |
+		  IXGBE_MSCA_MDI_COMMAND;
 
 	IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
 
@@ -423,43 +421,6 @@ STATIC s32 ixgbe_write_phy_reg_mdi_22(struct ixgbe_hw *hw, u32 reg_addr,
 }
 
 /**
- * ixgbe_identify_phy_1g - Get 1g PHY type based on device id
- * @hw: pointer to hardware structure
- *
- * Returns error code
- */
-STATIC s32 ixgbe_identify_phy_1g(struct ixgbe_hw *hw)
-{
-	u32 swfw_mask = hw->phy.phy_semaphore_mask;
-	u16 phy_id_high;
-	u16 phy_id_low;
-	s32 rc;
-
-	rc = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
-	if (rc)
-		return rc;
-
-	rc = ixgbe_read_phy_reg_mdi_22(hw, IXGBE_MDIO_PHY_ID_HIGH, 0,
-				       &phy_id_high);
-	if (rc)
-		goto rel_out;
-
-	rc = ixgbe_read_phy_reg_mdi_22(hw, IXGBE_MDIO_PHY_ID_LOW, 0,
-				       &phy_id_low);
-	if (rc)
-		goto rel_out;
-
-	hw->phy.id = (u32)phy_id_high << 16;
-	hw->phy.id |= phy_id_low & IXGBE_PHY_REVISION_MASK;
-	hw->phy.revision = (u32)phy_id_low & ~IXGBE_PHY_REVISION_MASK;
-
-rel_out:
-	hw->mac.ops.release_swfw_sync(hw, swfw_mask);
-
-	return rc;
-}
-
-/**
  * ixgbe_identify_phy_x550em - Get PHY type based on device id
  * @hw: pointer to hardware structure
  *
@@ -498,18 +459,11 @@ STATIC s32 ixgbe_identify_phy_x550em(struct ixgbe_hw *hw)
 		hw->phy.ops.read_reg = ixgbe_read_phy_reg_x550a;
 		hw->phy.ops.write_reg = ixgbe_write_phy_reg_x550a;
        /* Fallthrough to ixgbe_identify_phy_generic */
+	case IXGBE_DEV_ID_X550EM_A_1G_T:
+	case IXGBE_DEV_ID_X550EM_A_1G_T_L:
 	case IXGBE_DEV_ID_X550EM_X_1G_T:
 	case IXGBE_DEV_ID_X550EM_X_10G_T:
 		return ixgbe_identify_phy_generic(hw);
-	case IXGBE_DEV_ID_X550EM_A_1G_T:
-	case IXGBE_DEV_ID_X550EM_A_1G_T_L:
-		hw->phy.ops.read_reg = ixgbe_read_phy_reg_x550a;
-		hw->phy.ops.write_reg = ixgbe_write_phy_reg_x550a;
-		if (hw->bus.lan_id)
-			hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM;
-		else
-			hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM;
-		return ixgbe_identify_phy_1g(hw);
 	default:
 		break;
 	}
@@ -1544,7 +1498,6 @@ enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw)
 	case IXGBE_DEV_ID_X550EM_A_1G_T:
 	case IXGBE_DEV_ID_X550EM_A_1G_T_L:
 		media_type = ixgbe_media_type_copper;
-		hw->phy.type = ixgbe_phy_m88;
 		break;
 	default:
 		media_type = ixgbe_media_type_unknown;
@@ -1641,12 +1594,11 @@ s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)
  * @hw: pointer to hardware structure
  */
 STATIC s32 ixgbe_setup_sgmii(struct ixgbe_hw *hw, ixgbe_link_speed speed,
-			     bool autoneg_wait_to_complete)
+			     bool autoneg_wait)
 {
 	struct ixgbe_mac_info *mac = &hw->mac;
 	u32 lval, sval;
 	s32 rc;
-	UNREFERENCED_2PARAMETER(speed, autoneg_wait_to_complete);
 
 	rc = mac->ops.read_iosf_sb_reg(hw,
 				       IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
@@ -1683,6 +1635,126 @@ STATIC s32 ixgbe_setup_sgmii(struct ixgbe_hw *hw, ixgbe_link_speed speed,
 	rc = mac->ops.write_iosf_sb_reg(hw,
 					IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
 					IXGBE_SB_IOSF_TARGET_KR_PHY, lval);
+	if (rc)
+		return rc;
+
+	return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait);
+}
+
+ /**
+ * ixgbe_setup_sgmii_m88 - Set up link for sgmii with Marvell PHYs
+ * @hw: pointer to hardware structure
+ */
+STATIC s32 ixgbe_setup_sgmii_m88(struct ixgbe_hw *hw, ixgbe_link_speed speed,
+				 bool autoneg_wait)
+{
+	struct ixgbe_mac_info *mac = &hw->mac;
+	u32 lval, sval;
+	s32 rc;
+
+	rc = mac->ops.read_iosf_sb_reg(hw,
+				       IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
+				       IXGBE_SB_IOSF_TARGET_KR_PHY, &lval);
+	if (rc)
+		return rc;
+
+	lval &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;
+	lval &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK;
+	lval |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_SGMII_EN;
+	lval |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CLAUSE_37_EN;
+	lval &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G;
+	rc = mac->ops.write_iosf_sb_reg(hw,
+					IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
+					IXGBE_SB_IOSF_TARGET_KR_PHY, lval);
+	if (rc)
+		return rc;
+
+	rc = mac->ops.read_iosf_sb_reg(hw,
+				       IXGBE_KRM_SGMII_CTRL(hw->bus.lan_id),
+				       IXGBE_SB_IOSF_TARGET_KR_PHY, &sval);
+	if (rc)
+		return rc;
+
+	sval &= ~IXGBE_KRM_SGMII_CTRL_MAC_TAR_FORCE_10_D;
+	sval &= ~IXGBE_KRM_SGMII_CTRL_MAC_TAR_FORCE_100_D;
+	rc = mac->ops.write_iosf_sb_reg(hw,
+					IXGBE_KRM_SGMII_CTRL(hw->bus.lan_id),
+					IXGBE_SB_IOSF_TARGET_KR_PHY, sval);
+	if (rc)
+		return rc;
+
+	lval |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART;
+	rc = mac->ops.write_iosf_sb_reg(hw,
+					IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
+					IXGBE_SB_IOSF_TARGET_KR_PHY, lval);
+	if (rc)
+		return rc;
+
+	return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait);
+}
+
+/**
+ * ixgbe_check_link_m88 - Poll PHY for link
+ * @hw: pointer to hardware structure
+ * @speed: pointer to link speed
+ * @link_up: true when link is up
+ * @link_up_wait: bool indicating whether to wait for link
+ *
+ * Check that both the MAC and PHY have link.
+ */
+static s32
+ixgbe_check_link_m88(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
+		     bool *link_up, bool link_up_wait)
+{
+	u16 reg;
+	s32 rc;
+	u32 i;
+
+	rc = ixgbe_check_mac_link_generic(hw, speed, link_up, link_up_wait);
+	if (rc || !*link_up)
+		return rc;
+
+	rc = hw->phy.ops.read_reg(hw, IXGBE_M88E1500_PHY_SPEC_STATUS, 0, &reg);
+
+	/* MAC link is up, so check external PHY link */
+	*link_up = !!(reg & IXGBE_M88E1500_PHY_SPEC_STATUS_LINK);
+
+	if (link_up_wait) {
+		for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) {
+			if (!rc &&
+			    (reg & IXGBE_M88E1500_PHY_SPEC_STATUS_LINK)) {
+				*link_up = true;
+				break;
+			}
+			*link_up = false;
+			msec_delay(100);
+			rc = hw->phy.ops.read_reg(hw,
+						 IXGBE_M88E1500_PHY_SPEC_STATUS,
+						 0, &reg);
+		}
+	}
+
+#define M88_SPEED(x) (IXGBE_M88E1500_PHY_SPEC_STATUS_RESOLVED  | \
+		      IXGBE_M88E1500_PHY_SPEC_STATUS_DUPLEX     | \
+		      ((IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_##x) <<\
+			IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_SHIFT))
+
+	reg &= M88_SPEED(MASK);
+	switch (reg) {
+	case M88_SPEED(10):
+		*speed = IXGBE_LINK_SPEED_10_FULL;
+		break;
+	case M88_SPEED(100):
+		*speed = IXGBE_LINK_SPEED_100_FULL;
+		break;
+	case M88_SPEED(1000):
+		*speed = IXGBE_LINK_SPEED_1GB_FULL;
+		break;
+	default:
+		*speed = IXGBE_LINK_SPEED_UNKNOWN;
+		break;
+	}
+#undef M88_SPEED
 
 	return rc;
 }
@@ -1717,8 +1789,14 @@ void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw)
 				ixgbe_setup_mac_link_sfp_x550em;
 		break;
 	case ixgbe_media_type_copper:
-		mac->ops.setup_link = ixgbe_setup_mac_link_t_X550em;
-		mac->ops.check_link = ixgbe_check_link_t_X550em;
+		if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T ||
+		    hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L) {
+			mac->ops.setup_link = ixgbe_setup_sgmii_m88;
+			mac->ops.check_link = ixgbe_check_link_m88;
+		} else {
+			mac->ops.setup_link = ixgbe_setup_mac_link_t_X550em;
+			mac->ops.check_link = ixgbe_check_link_t_X550em;
+		}
 		break;
 	case ixgbe_media_type_backplane:
 		if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SGMII ||
@@ -1766,8 +1844,9 @@ s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
 	} else {
 		switch (hw->phy.type) {
 		case ixgbe_phy_m88:
-			*speed = IXGBE_LINK_SPEED_100_FULL |
-				 IXGBE_LINK_SPEED_1GB_FULL;
+			*speed = IXGBE_LINK_SPEED_1GB_FULL |
+				 IXGBE_LINK_SPEED_100_FULL |
+				 IXGBE_LINK_SPEED_10_FULL;
 			break;
 		case ixgbe_phy_sgmii:
 			*speed = IXGBE_LINK_SPEED_1GB_FULL;
@@ -2000,171 +2079,266 @@ STATIC s32 ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *hw,
 }
 
 /**
- * ixgbe_set_master_slave_mode - Set up PHY for master/slave mode
+ * ixgbe_setup_m88 - setup m88 PHY
  * @hw: pointer to hardware structure
- *
- * Must be called while holding the PHY semaphore and token
  */
-STATIC s32 ixgbe_set_master_slave_mode(struct ixgbe_hw *hw)
+STATIC s32 ixgbe_setup_m88(struct ixgbe_hw *hw)
 {
-	u16 phy_data;
+	u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;
+	u16 reg;
 	s32 rc;
 
-	/* Resolve master/slave mode */
-	rc = ixgbe_read_phy_reg_mdi_22(hw, IXGBE_M88E1500_1000T_CTRL, 0,
-				       &phy_data);
+	if (hw->phy.reset_disable || ixgbe_check_reset_blocked(hw))
+		return IXGBE_SUCCESS;
+
+	rc = hw->mac.ops.acquire_swfw_sync(hw, mask);
 	if (rc)
 		return rc;
 
-	/* load defaults for future use */
-	if (phy_data & IXGBE_M88E1500_1000T_CTRL_MS_ENABLE) {
-		if (phy_data & IXGBE_M88E1500_1000T_CTRL_MS_VALUE)
-			hw->phy.original_ms_type = ixgbe_ms_force_master;
-		else
-			hw->phy.original_ms_type = ixgbe_ms_force_slave;
+	rc = hw->phy.ops.read_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0, &reg);
+	if (rc)
+		goto out;
+	if (reg & IXGBE_M88E1500_COPPER_CTRL_POWER_DOWN) {
+		reg &= ~IXGBE_M88E1500_COPPER_CTRL_POWER_DOWN;
+		hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0,
+					  reg);
+	}
+
+	rc = hw->phy.ops.read_reg_mdi(hw, IXGBE_M88E1500_MAC_CTRL_1, 0, &reg);
+	if (rc)
+		goto out;
+	if (reg & IXGBE_M88E1500_MAC_CTRL_1_POWER_DOWN) {
+		reg &= ~IXGBE_M88E1500_MAC_CTRL_1_POWER_DOWN;
+		hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_MAC_CTRL_1, 0,
+					  reg);
+	}
+
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 2);
+	if (rc)
+		goto out;
+
+	rc = hw->phy.ops.read_reg_mdi(hw, IXGBE_M88E1500_MAC_SPEC_CTRL, 0,
+				      &reg);
+	if (rc)
+		goto out;
+	if (reg & IXGBE_M88E1500_MAC_SPEC_CTRL_POWER_DOWN) {
+		reg &= ~IXGBE_M88E1500_MAC_SPEC_CTRL_POWER_DOWN;
+		hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_MAC_SPEC_CTRL, 0,
+					  reg);
+		rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_PAGE_ADDR, 0,
+					       0);
+		if (rc)
+			goto out;
+		rc = hw->phy.ops.read_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0,
+					      &reg);
+		if (rc)
+			goto out;
+		reg |= IXGBE_M88E1500_COPPER_CTRL_RESET;
+		hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0,
+					  reg);
+		usec_delay(50);
 	} else {
-		hw->phy.original_ms_type = ixgbe_ms_auto;
+		rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_PAGE_ADDR, 0,
+					       0);
+		if (rc)
+			goto out;
 	}
 
-	switch (hw->phy.ms_type) {
-	case ixgbe_ms_force_master:
-		phy_data |= IXGBE_M88E1500_1000T_CTRL_MS_ENABLE;
-		phy_data |= IXGBE_M88E1500_1000T_CTRL_MS_VALUE;
+	rc = hw->phy.ops.read_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0, &reg);
+	if (rc)
+		goto out;
+
+	if (!(reg & IXGBE_M88E1500_COPPER_CTRL_AN_EN)) {
+		reg |= IXGBE_M88E1500_COPPER_CTRL_AN_EN;
+		hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0,
+					  reg);
+	}
+
+	rc = hw->phy.ops.read_reg_mdi(hw, IXGBE_M88E1500_1000T_CTRL, 0, &reg);
+	if (rc)
+		goto out;
+	reg &= ~IXGBE_M88E1500_1000T_CTRL_HALF_DUPLEX;
+	reg &= ~IXGBE_M88E1500_1000T_CTRL_FULL_DUPLEX;
+	if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
+		reg |= IXGBE_M88E1500_1000T_CTRL_FULL_DUPLEX;
+	hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_1000T_CTRL, 0, reg);
+
+	rc = hw->phy.ops.read_reg_mdi(hw, IXGBE_M88E1500_COPPER_AN, 0, &reg);
+	if (rc)
+		goto out;
+	reg &= ~IXGBE_M88E1500_COPPER_AN_AS_PAUSE;
+	reg &= ~IXGBE_M88E1500_COPPER_AN_PAUSE;
+	reg &= ~IXGBE_M88E1500_COPPER_AN_T4;
+	reg &= ~IXGBE_M88E1500_COPPER_AN_100TX_FD;
+	reg &= ~IXGBE_M88E1500_COPPER_AN_100TX_HD;
+	reg &= ~IXGBE_M88E1500_COPPER_AN_10TX_FD;
+	reg &= ~IXGBE_M88E1500_COPPER_AN_10TX_HD;
+	switch (hw->fc.current_mode) {
+	case ixgbe_fc_full:
+		reg |= IXGBE_M88E1500_COPPER_AN_PAUSE;
 		break;
-	case ixgbe_ms_force_slave:
-		phy_data |= IXGBE_M88E1500_1000T_CTRL_MS_ENABLE;
-		phy_data &= ~IXGBE_M88E1500_1000T_CTRL_MS_VALUE;
+	case ixgbe_fc_rx_pause:
+		reg |= IXGBE_M88E1500_COPPER_AN_PAUSE;
+		reg |= IXGBE_M88E1500_COPPER_AN_AS_PAUSE;
 		break;
-	case ixgbe_ms_auto:
-		phy_data &= ~IXGBE_M88E1500_1000T_CTRL_MS_ENABLE;
+	case ixgbe_fc_tx_pause:
+		reg |= IXGBE_M88E1500_COPPER_AN_AS_PAUSE;
 		break;
 	default:
 		break;
 	}
 
-	return ixgbe_write_phy_reg_mdi_22(hw, IXGBE_M88E1500_1000T_CTRL, 0,
-					  phy_data);
+	if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)
+		reg |= IXGBE_M88E1500_COPPER_AN_100TX_FD;
+	if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL)
+		reg |= IXGBE_M88E1500_COPPER_AN_10TX_FD;
+	hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_COPPER_AN, 0, reg);
+
+	rc = hw->phy.ops.read_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0, &reg);
+	if (rc)
+		goto out;
+	reg |= IXGBE_M88E1500_COPPER_CTRL_RESTART_AN;
+	hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0, reg);
+
+
+	hw->mac.ops.release_swfw_sync(hw, mask);
+	return rc;
+
+out:
+	hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 0);
+	hw->mac.ops.release_swfw_sync(hw, mask);
+	return rc;
 }
 
 /**
- * ixgbe_reset_phy_m88_nolock - Reset m88 PHY without locking
+ * ixgbe_reset_phy_m88e1500 - Reset m88e1500 PHY
  * @hw: pointer to hardware structure
  *
- * Must be called while holding the PHY semaphore and token
+ * The PHY token must be held when calling this function.
  */
-STATIC s32 ixgbe_reset_phy_m88_nolock(struct ixgbe_hw *hw)
+static s32 ixgbe_reset_phy_m88e1500(struct ixgbe_hw *hw)
 {
+	u16 reg;
 	s32 rc;
 
-	rc = ixgbe_write_phy_reg_mdi_22(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 1);
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 0);
 	if (rc)
 		return rc;
 
-	rc = ixgbe_write_phy_reg_mdi_22(hw, IXGBE_M88E1500_FIBER_CTRL, 0,
-					IXGBE_M88E1500_FIBER_CTRL_RESET |
-					IXGBE_M88E1500_FIBER_CTRL_DUPLEX_FULL |
-					IXGBE_M88E1500_FIBER_CTRL_SPEED_MSB);
+	rc = hw->phy.ops.read_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0, &reg);
 	if (rc)
-		goto res_out;
-
-	rc = ixgbe_write_phy_reg_mdi_22(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 18);
-	if (rc)
-		goto res_out;
-
-	rc = ixgbe_write_phy_reg_mdi_22(hw, IXGBE_M88E1500_GEN_CTRL, 0,
-					IXGBE_M88E1500_GEN_CTRL_RESET |
-					IXGBE_M88E1500_GEN_CTRL_SGMII_COPPER);
-	if (rc)
-		goto res_out;
+		return rc;
 
-	rc = ixgbe_write_phy_reg_mdi_22(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 0);
-	if (rc)
-		goto res_out;
+	reg |= IXGBE_M88E1500_COPPER_CTRL_RESET;
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0, reg);
 
-	rc = ixgbe_write_phy_reg_mdi_22(hw, IXGBE_M88E1500_COPPER_CTRL, 0,
-					IXGBE_M88E1500_COPPER_CTRL_RESET |
-					IXGBE_M88E1500_COPPER_CTRL_AN_EN |
-					IXGBE_M88E1500_COPPER_CTRL_RESTART_AN |
-					IXGBE_M88E1500_COPPER_CTRL_FULL_DUPLEX |
-					IXGBE_M88E1500_COPPER_CTRL_SPEED_MSB);
+	usec_delay(10);
 
-res_out:
-	ixgbe_write_phy_reg_mdi_22(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 0);
 	return rc;
 }
 
 /**
+ * ixgbe_reset_phy_m88e1543 - Reset m88e1543 PHY
+ * @hw: pointer to hardware structure
+ *
+ * The PHY token must be held when calling this function.
+ */
+static s32 ixgbe_reset_phy_m88e1543(struct ixgbe_hw *hw)
+{
+	return hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 0);
+}
+
+/**
  * ixgbe_reset_phy_m88 - Reset m88 PHY
  * @hw: pointer to hardware structure
  */
 STATIC s32 ixgbe_reset_phy_m88(struct ixgbe_hw *hw)
 {
-	u32 swfw_mask = hw->phy.phy_semaphore_mask;
+	u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;
+	u16 reg;
 	s32 rc;
 
 	if (hw->phy.reset_disable || ixgbe_check_reset_blocked(hw))
 		return IXGBE_SUCCESS;
 
-	rc = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
+	rc = hw->mac.ops.acquire_swfw_sync(hw, mask);
 	if (rc)
 		return rc;
 
-	rc = ixgbe_reset_phy_m88_nolock(hw);
+	switch (hw->phy.id) {
+	case IXGBE_M88E1500_E_PHY_ID:
+		rc = ixgbe_reset_phy_m88e1500(hw);
+		break;
+	case IXGBE_M88E1543_E_PHY_ID:
+		rc = ixgbe_reset_phy_m88e1543(hw);
+		break;
+	default:
+		rc = IXGBE_ERR_PHY;
+		break;
+	}
 
-	hw->mac.ops.release_swfw_sync(hw, swfw_mask);
-	return rc;
-}
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 1);
+	if (rc)
+		goto out;
 
-/**
- * ixgbe_setup_m88 - setup m88 PHY
- * @hw: pointer to hardware structure
- */
-STATIC s32 ixgbe_setup_m88(struct ixgbe_hw *hw)
-{
-	u32 swfw_mask = hw->phy.phy_semaphore_mask;
-	struct ixgbe_phy_info *phy = &hw->phy;
-	u16 phy_data;
-	s32 rc;
+	reg = IXGBE_M88E1500_FIBER_CTRL_RESET |
+	      IXGBE_M88E1500_FIBER_CTRL_DUPLEX_FULL |
+	      IXGBE_M88E1500_FIBER_CTRL_SPEED_MSB;
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_FIBER_CTRL, 0, reg);
+	if (rc)
+		goto out;
 
-	if (phy->reset_disable || ixgbe_check_reset_blocked(hw))
-		return IXGBE_SUCCESS;
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 18);
+	if (rc)
+		goto out;
 
-	rc = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
+	reg = IXGBE_M88E1500_GEN_CTRL_RESET |
+	      IXGBE_M88E1500_GEN_CTRL_MODE_SGMII_COPPER;
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_GEN_CTRL, 0, reg);
 	if (rc)
-		return rc;
+		goto out;
 
-	rc = ixgbe_read_phy_reg_mdi_22(hw, IXGBE_M88E1500_PHY_SPEC_CTRL, 0,
-				       &phy_data);
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 1);
 	if (rc)
-		goto rel_out;
-
-	/* Enable downshift and setting it to X6 */
-	phy_data &= ~IXGBE_M88E1500_PSCR_DOWNSHIFT_ENABLE;
-	phy_data |= IXGBE_M88E1500_PSCR_DOWNSHIFT_6X;
-	phy_data |= IXGBE_M88E1500_PSCR_DOWNSHIFT_ENABLE;
-	rc = ixgbe_write_phy_reg_mdi_22(hw,
-					IXGBE_M88E1500_PHY_SPEC_CTRL, 0,
-					phy_data);
+		goto out;
+
+	reg = IXGBE_M88E1500_FIBER_CTRL_RESET |
+	      IXGBE_M88E1500_FIBER_CTRL_AN_EN |
+	      IXGBE_M88E1500_FIBER_CTRL_DUPLEX_FULL |
+	      IXGBE_M88E1500_FIBER_CTRL_SPEED_MSB;
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_FIBER_CTRL, 0, reg);
 	if (rc)
-		goto rel_out;
+		goto out;
 
-	ixgbe_write_phy_reg_mdi_22(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 0);
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 0);
+	if (rc)
+		goto out;
 
-	/* Commit the changes */
-	rc = ixgbe_reset_phy_m88_nolock(hw);
-	if (rc) {
-		DEBUGOUT("Error committing the PHY changes\n");
-		goto rel_out;
-	}
+	reg = (IXGBE_M88E1500_MAC_CTRL_1_DWN_4X <<
+	       IXGBE_M88E1500_MAC_CTRL_1_DWN_SHIFT) |
+	      (IXGBE_M88E1500_MAC_CTRL_1_ED_TM <<
+	       IXGBE_M88E1500_MAC_CTRL_1_ED_SHIFT) |
+	      (IXGBE_M88E1500_MAC_CTRL_1_MDIX_AUTO <<
+	       IXGBE_M88E1500_MAC_CTRL_1_MDIX_SHIFT);
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_MAC_CTRL_1, 0, reg);
+	if (rc)
+		goto out;
 
-	rc = ixgbe_set_master_slave_mode(hw);
+	reg = IXGBE_M88E1500_COPPER_CTRL_RESET |
+	      IXGBE_M88E1500_COPPER_CTRL_AN_EN |
+	      IXGBE_M88E1500_COPPER_CTRL_RESTART_AN |
+	      IXGBE_M88E1500_COPPER_CTRL_FULL_DUPLEX |
+	      IXGBE_M88E1500_COPPER_CTRL_SPEED_MSB;
+	rc = hw->phy.ops.write_reg_mdi(hw, IXGBE_M88E1500_COPPER_CTRL, 0, reg);
+	if (rc)
+		goto out;
 
-	hw->mac.ops.release_swfw_sync(hw, swfw_mask);
-	return rc;
+	hw->mac.ops.release_swfw_sync(hw, mask);
 
-rel_out:
-	ixgbe_write_phy_reg_mdi_22(hw, IXGBE_M88E1500_PAGE_ADDR, 0, 0);
-	hw->mac.ops.release_swfw_sync(hw, swfw_mask);
+	return ixgbe_setup_m88(hw);
+
+out:
+	hw->mac.ops.release_swfw_sync(hw, mask);
 	return rc;
 }
 
@@ -2220,6 +2394,16 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
 		phy->ops.identify_sfp = ixgbe_identify_sfp_module_X550em;
 	}
 
+	switch (hw->device_id) {
+	case IXGBE_DEV_ID_X550EM_A_1G_T:
+	case IXGBE_DEV_ID_X550EM_A_1G_T_L:
+		phy->ops.read_reg_mdi = ixgbe_read_phy_reg_mdi_22;
+		phy->ops.write_reg_mdi = ixgbe_write_phy_reg_mdi_22;
+		break;
+	default:
+		break;
+	}
+
 	/* Identify the PHY or SFP module */
 	ret_val = phy->ops.identify(hw);
 	if (ret_val == IXGBE_ERR_SFP_NOT_SUPPORTED)
@@ -2263,8 +2447,6 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
 		break;
 	case ixgbe_phy_m88:
 		phy->ops.setup_link = ixgbe_setup_m88;
-		phy->ops.read_reg_mdi = ixgbe_read_phy_reg_mdi_22;
-		phy->ops.write_reg_mdi = ixgbe_write_phy_reg_mdi_22;
 		phy->ops.reset = ixgbe_reset_phy_m88;
 		break;
 	default:
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.h b/drivers/net/ixgbe/base/ixgbe_x550.h
index 27d5d02..8a8381f 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.h
+++ b/drivers/net/ixgbe/base/ixgbe_x550.h
@@ -36,49 +36,6 @@ POSSIBILITY OF SUCH DAMAGE.
 
 #include "ixgbe_type.h"
 
-/* More phy definitions */
-#define IXGBE_M88E1500_COPPER_CTRL		0x0/* Page 0 reg */
-#define IXGBE_M88E1500_COPPER_CTRL_RESET	0x8000
-#define IXGBE_M88E1500_COPPER_CTRL_AN_EN	0x1000
-#define IXGBE_M88E1500_COPPER_CTRL_RESTART_AN	0x0200
-#define IXGBE_M88E1500_COPPER_CTRL_FULL_DUPLEX	0x0100
-#define IXGBE_M88E1500_COPPER_CTRL_SPEED_MSB	0x0040
-#define IXGBE_M88E1500_1000T_CTRL		0x09 /* 1000Base-T Ctrl Reg */
-/* 1=Configure PHY as Master 0=Configure PHY as Slave */
-#define IXGBE_M88E1500_1000T_CTRL_MS_VALUE	0x0800
-/* 1=Master/Slave manual config value 0=Automatic Master/Slave config */
-#define IXGBE_M88E1500_1000T_CTRL_MS_ENABLE	0x1000
-#define IXGBE_M88E1500_1000T_STATUS		0x0A /* 1000Base-T Status Reg */
-#define IXGBE_M88E1500_AUTO_COPPER_SGMII	0x2
-#define IXGBE_M88E1500_AUTO_COPPER_BASEX	0x3
-#define IXGBE_M88E1500_STATUS_LINK		0x0004 /* Interface Link Bit */
-#define IXGBE_M88E1500_MAC_CTRL_1		0x10
-#define IXGBE_M88E1500_MAC_CTRL_1_MODE_MASK	0x0380 /* Mode Select */
-#define IXGBE_M88E1500_CFG_REG_1		0x0010
-#define IXGBE_M88E1500_CFG_REG_2		0x0011
-#define IXGBE_M88E1500_CFG_REG_3		0x0007
-#define IXGBE_M88E1500_MODE			0x0014
-#define IXGBE_M88E1500_PAGE_ADDR		0x16/* Page Offset reg */
-#define IXGBE_M88E1500_FIBER_CTRL		0x0/* Page 1 reg */
-#define IXGBE_M88E1500_FIBER_CTRL_RESET		0x8000
-#define IXGBE_M88E1500_FIBER_CTRL_SPEED_LSB	0x2000
-#define IXGBE_M88E1500_FIBER_CTRL_POWER_DOWN	0x0800
-#define IXGBE_M88E1500_FIBER_CTRL_DUPLEX_FULL	0x0100
-#define IXGBE_M88E1500_FIBER_CTRL_SPEED_MSB	0x0040
-#define IXGBE_M88E1500_EEE_CTRL_1		0x0/* Page 18 reg */
-#define IXGBE_M88E1500_EEE_CTRL_1_MS		0x0001/* EEE Master/Slave */
-#define IXGBE_M88E1500_GEN_CTRL			0x14/* Page 18 reg */
-#define IXGBE_M88E1500_GEN_CTRL_RESET		0x8000
-#define IXGBE_M88E1500_GEN_CTRL_SGMII_COPPER	0x0001/* Mode bits 0-2 */
-
-/* M88E1500 Specific Registers */
-#define IXGBE_M88E1500_PHY_SPEC_CTRL		0x10 /* PHY Specific Ctrl Reg */
-#define IXGBE_M88E1500_PHY_SPEC_STATUS		0x11 /* PHY Specific Stat Reg */
-
-#define IXGBE_M88E1500_PSCR_DOWNSHIFT_ENABLE	0x0800
-#define IXGBE_M88E1500_PSCR_DOWNSHIFT_MASK	0x7000
-#define IXGBE_M88E1500_PSCR_DOWNSHIFT_6X	0x5000
-
 s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw);
 s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw);
 s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw);
