From patchwork Sun Sep 25 09:00:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiao Wang X-Patchwork-Id: 16097 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 372FD8E8D; Sun, 25 Sep 2016 11:02:06 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 2DE398D93 for ; Sun, 25 Sep 2016 11:01:56 +0200 (CEST) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga104.fm.intel.com with ESMTP; 25 Sep 2016 02:01:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,392,1470726000"; d="scan'208";a="12951644" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga006.fm.intel.com with ESMTP; 25 Sep 2016 02:01:54 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id u8P91qKX019177; Sun, 25 Sep 2016 17:01:52 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id u8P91nQZ006185; Sun, 25 Sep 2016 17:01:51 +0800 Received: (from xiaowan1@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id u8P91njV006181; Sun, 25 Sep 2016 17:01:49 +0800 From: Xiao Wang To: wenzhuo.lu@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Xiao Wang Date: Sun, 25 Sep 2016 17:00:13 +0800 Message-Id: <1474794017-5896-37-git-send-email-xiao.w.wang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1474794017-5896-1-git-send-email-xiao.w.wang@intel.com> References: <1472312902-16963-2-git-send-email-xiao.w.wang@intel.com> <1474794017-5896-1-git-send-email-xiao.w.wang@intel.com> Subject: [dpdk-dev] [PATCH v2 36/40] net/ixgbe/base: update X550em_a backplane speed X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Correct link flow for X550em_a backplane with ALEF. Report the correct link capabilities: SKUs configured for 2.5G only support 2.5G. non-10G SKUs can only support 2.5 or 1G. Signed-off-by: Xiao Wang --- drivers/net/ixgbe/base/ixgbe_type.h | 5 +++++ drivers/net/ixgbe/base/ixgbe_x550.c | 37 +++++++++++++++++++++++++++++-------- 2 files changed, 34 insertions(+), 8 deletions(-) diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h index 13c520e..4982e03 100644 --- a/drivers/net/ixgbe/base/ixgbe_type.h +++ b/drivers/net/ixgbe/base/ixgbe_type.h @@ -4252,6 +4252,11 @@ struct ixgbe_hw { #define IXGBE_NW_MNG_IF_SEL_MDIO_ACT (1u << 1) #define IXGBE_NW_MNG_IF_SEL_MDIO_IF_MODE (1u << 2) #define IXGBE_NW_MNG_IF_SEL_EN_SHARED_MDIO (1u << 13) +#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_10M (1u << 17) +#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_100M (1u << 18) +#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_1G (1u << 19) +#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_2_5G (1u << 20) +#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_10G (1u << 21) #define IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M (1 << 23) #define IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE (1 << 24) #define IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT 3 diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c index 6f4dfd9..8c2479b 100644 --- a/drivers/net/ixgbe/base/ixgbe_x550.c +++ b/drivers/net/ixgbe/base/ixgbe_x550.c @@ -1887,6 +1887,20 @@ s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw, case ixgbe_phy_sgmii: *speed = IXGBE_LINK_SPEED_1GB_FULL; break; + case ixgbe_phy_x550em_kr: + if (hw->mac.type == ixgbe_mac_X550EM_a) { + /* check different backplane modes */ + if (hw->phy.nw_mng_if_sel & + IXGBE_NW_MNG_IF_SEL_PHY_SPEED_2_5G) { + *speed = IXGBE_LINK_SPEED_2_5GB_FULL; + break; + } else if (hw->device_id == + IXGBE_DEV_ID_X550EM_A_KR_L) { + *speed = IXGBE_LINK_SPEED_1GB_FULL; + break; + } + } + /* fall through */ default: *speed = IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL; @@ -2109,18 +2123,25 @@ STATIC s32 ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *hw, IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); - if (status) - return status; + if (hw->mac.type == ixgbe_mac_X550EM_a) { + /* Set lane mode to KR auto negotiation */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); - reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK; - reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN; - reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN; - reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN; - reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN; + if (status) + return status; - status = hw->mac.ops.write_iosf_sb_reg(hw, + reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK; + reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN; + reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN; + reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN; + reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN; + + status = hw->mac.ops.write_iosf_sb_reg(hw, IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + } return ixgbe_restart_an_internal_phy_x550em(hw); }