[dpdk-dev] e1000: configure VLAN TPID
Commit Message
This patch enables configuring the ether types of both inner and
outer VLANs. Note that TPID of single or inner VLAN is read only.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
drivers/net/e1000/igb_ethdev.c | 34 +++++++++++++++++++++++++++++++---
1 file changed, 31 insertions(+), 3 deletions(-)
Comments
Hi Beilei,
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Beilei Xing
> Sent: Thursday, April 21, 2016 4:56 PM
> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>
> Cc: dev@dpdk.org; Xing, Beilei <beilei.xing@intel.com>
> Subject: [dpdk-dev] [PATCH] e1000: configure VLAN TPID
>
> This patch enables configuring the ether types of both inner and outer VLANs.
> Note that TPID of single or inner VLAN is read only.
>
> Signed-off-by: Beilei Xing <beilei.xing@intel.com>
> ---
> drivers/net/e1000/igb_ethdev.c | 34 +++++++++++++++++++++++++++++++---
> 1 file changed, 31 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
> index e0053fe..c957fbe 100644
> --- a/drivers/net/e1000/igb_ethdev.c
> +++ b/drivers/net/e1000/igb_ethdev.c
> @@ -86,6 +86,14 @@
> #define E1000_INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT)
> #define E1000_TSAUXC_DISABLE_SYSTIME 0x80000000
>
> +/* CTRL_EXT bit mask*/
> +#define E1000_CTRL_EXT_EXT_VLAN (1 << 26)
> +
> +/* VLAN Ether Type bit mask */
> +#define E1000_VET_VET_EXT 0xFFFF0000
> +
> +#define E1000_VET_VET_EXT_SHIFT 16
> +
> static int eth_igb_configure(struct rte_eth_dev *dev); static int
> eth_igb_start(struct rte_eth_dev *dev); static void eth_igb_stop(struct
> rte_eth_dev *dev); @@ -2242,13 +2250,33 @@ eth_igb_vlan_tpid_set(struct
> rte_eth_dev *dev, {
> struct e1000_hw *hw =
> E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> - uint32_t reg = ETHER_TYPE_VLAN;
> + uint32_t reg;
> + uint32_t qinq;
> int ret = 0;
>
> + qinq = E1000_READ_REG(hw, E1000_CTRL_EXT);
> + qinq &= E1000_CTRL_EXT_EXT_VLAN;
> +
> switch (vlan_type) {
> case ETH_VLAN_TYPE_INNER:
> - reg |= (tpid << 16);
> - E1000_WRITE_REG(hw, E1000_VET, reg);
> + if (qinq)
> + PMD_DRV_LOG(WARNING,
> + "inner vlan ether type is read-only\n");
Add: ret = -ENOTSUP or something else, so that the programmer can handle it.
The same for below.
> + else {
> + PMD_DRV_LOG(ERR, "not set QinQ on yet\n");
> + ret = -EIO;
> + }
> + break;
> + case ETH_VLAN_TYPE_OUTER:
> + if (qinq) {
> + reg = E1000_READ_REG(hw, E1000_VET);
> + reg = (reg & (~E1000_VET_VET_EXT)) |
> + ((uint32_t)tpid << E1000_VET_VET_EXT_SHIFT);
> + E1000_WRITE_REG(hw, E1000_VET, reg);
> + } else
> + PMD_DRV_LOG(WARNING,
> + "single vlan ether type is read-only\n");
> +
> break;
> default:
> ret = -EINVAL;
> --
> 2.5.0
Since both inner and outer tpid are considered in this patch, the comment in
rte_ethdev.h "vlan_tpid_set; /**< Outer VLAN TPID Setup. */" should be changed
accordingly.
Best Regards,
Xiao
> -----Original Message-----
> From: Wang, Xiao W
> Sent: Thursday, June 2, 2016 2:44 PM
> To: Xing, Beilei <beilei.xing@intel.com>; Lu, Wenzhuo
> <wenzhuo.lu@intel.com>
> Cc: dev@dpdk.org
> Subject: RE: [dpdk-dev] [PATCH] e1000: configure VLAN TPID
>
> Hi Beilei,
>
> > -----Original Message-----
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Beilei Xing
> > Sent: Thursday, April 21, 2016 4:56 PM
> > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>
> > Cc: dev@dpdk.org; Xing, Beilei <beilei.xing@intel.com>
> > Subject: [dpdk-dev] [PATCH] e1000: configure VLAN TPID
> >
> > This patch enables configuring the ether types of both inner and outer
> VLANs.
> > Note that TPID of single or inner VLAN is read only.
> >
> > Signed-off-by: Beilei Xing <beilei.xing@intel.com>
> > ---
> > drivers/net/e1000/igb_ethdev.c | 34
> > +++++++++++++++++++++++++++++++---
> > 1 file changed, 31 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/net/e1000/igb_ethdev.c
> > b/drivers/net/e1000/igb_ethdev.c index e0053fe..c957fbe 100644
> > --- a/drivers/net/e1000/igb_ethdev.c
> > +++ b/drivers/net/e1000/igb_ethdev.c
> > @@ -86,6 +86,14 @@
> > #define E1000_INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT)
> > #define E1000_TSAUXC_DISABLE_SYSTIME 0x80000000
> >
> > +/* CTRL_EXT bit mask*/
> > +#define E1000_CTRL_EXT_EXT_VLAN (1 << 26)
> > +
> > +/* VLAN Ether Type bit mask */
> > +#define E1000_VET_VET_EXT 0xFFFF0000
> > +
> > +#define E1000_VET_VET_EXT_SHIFT 16
> > +
> > static int eth_igb_configure(struct rte_eth_dev *dev); static int
> > eth_igb_start(struct rte_eth_dev *dev); static void
> > eth_igb_stop(struct rte_eth_dev *dev); @@ -2242,13 +2250,33 @@
> > eth_igb_vlan_tpid_set(struct rte_eth_dev *dev, {
> > struct e1000_hw *hw =
> > E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> > - uint32_t reg = ETHER_TYPE_VLAN;
> > + uint32_t reg;
> > + uint32_t qinq;
> > int ret = 0;
> >
> > + qinq = E1000_READ_REG(hw, E1000_CTRL_EXT);
> > + qinq &= E1000_CTRL_EXT_EXT_VLAN;
> > +
> > switch (vlan_type) {
> > case ETH_VLAN_TYPE_INNER:
> > - reg |= (tpid << 16);
> > - E1000_WRITE_REG(hw, E1000_VET, reg);
> > + if (qinq)
> > + PMD_DRV_LOG(WARNING,
> > + "inner vlan ether type is read-only\n");
>
> Add: ret = -ENOTSUP or something else, so that the programmer can handle
> it.
> The same for below.
Yes, I think -ENOTSUP should be more appropriate here.
>
> > + else {
> > + PMD_DRV_LOG(ERR, "not set QinQ on yet\n");
> > + ret = -EIO;
> > + }
> > + break;
> > + case ETH_VLAN_TYPE_OUTER:
> > + if (qinq) {
> > + reg = E1000_READ_REG(hw, E1000_VET);
> > + reg = (reg & (~E1000_VET_VET_EXT)) |
> > + ((uint32_t)tpid <<
> E1000_VET_VET_EXT_SHIFT);
> > + E1000_WRITE_REG(hw, E1000_VET, reg);
> > + } else
> > + PMD_DRV_LOG(WARNING,
> > + "single vlan ether type is read-only\n");
> > +
> > break;
> > default:
> > ret = -EINVAL;
> > --
> > 2.5.0
>
> Since both inner and outer tpid are considered in this patch, the comment in
> rte_ethdev.h "vlan_tpid_set; /**< Outer VLAN TPID Setup. */" should be
> changed
> accordingly.
Hi Xiao,
Thanks for your review, I've sent a new patch.
>
> Best Regards,
> Xiao
@@ -86,6 +86,14 @@
#define E1000_INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT)
#define E1000_TSAUXC_DISABLE_SYSTIME 0x80000000
+/* CTRL_EXT bit mask*/
+#define E1000_CTRL_EXT_EXT_VLAN (1 << 26)
+
+/* VLAN Ether Type bit mask */
+#define E1000_VET_VET_EXT 0xFFFF0000
+
+#define E1000_VET_VET_EXT_SHIFT 16
+
static int eth_igb_configure(struct rte_eth_dev *dev);
static int eth_igb_start(struct rte_eth_dev *dev);
static void eth_igb_stop(struct rte_eth_dev *dev);
@@ -2242,13 +2250,33 @@ eth_igb_vlan_tpid_set(struct rte_eth_dev *dev,
{
struct e1000_hw *hw =
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- uint32_t reg = ETHER_TYPE_VLAN;
+ uint32_t reg;
+ uint32_t qinq;
int ret = 0;
+ qinq = E1000_READ_REG(hw, E1000_CTRL_EXT);
+ qinq &= E1000_CTRL_EXT_EXT_VLAN;
+
switch (vlan_type) {
case ETH_VLAN_TYPE_INNER:
- reg |= (tpid << 16);
- E1000_WRITE_REG(hw, E1000_VET, reg);
+ if (qinq)
+ PMD_DRV_LOG(WARNING,
+ "inner vlan ether type is read-only\n");
+ else {
+ PMD_DRV_LOG(ERR, "not set QinQ on yet\n");
+ ret = -EIO;
+ }
+ break;
+ case ETH_VLAN_TYPE_OUTER:
+ if (qinq) {
+ reg = E1000_READ_REG(hw, E1000_VET);
+ reg = (reg & (~E1000_VET_VET_EXT)) |
+ ((uint32_t)tpid << E1000_VET_VET_EXT_SHIFT);
+ E1000_WRITE_REG(hw, E1000_VET, reg);
+ } else
+ PMD_DRV_LOG(WARNING,
+ "single vlan ether type is read-only\n");
+
break;
default:
ret = -EINVAL;