From patchwork Fri Dec 4 01:05:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Hemminger X-Patchwork-Id: 9331 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 84FC18E5A; Fri, 4 Dec 2015 02:05:04 +0100 (CET) Received: from mail-pf0-f169.google.com (mail-pf0-f169.google.com [209.85.192.169]) by dpdk.org (Postfix) with ESMTP id 3872D8E59 for ; Fri, 4 Dec 2015 02:05:02 +0100 (CET) Received: by pfu207 with SMTP id 207so17118611pfu.2 for ; Thu, 03 Dec 2015 17:05:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jhOZCCCBqKuLxWy2mIf6Yw4rqrpRNhf8GEv9RArROxI=; b=Mfo5UwmP8ssmQt58o7GXeItdta2XqMmqHQAOM8GJbV67qlS9vE/YiD7PUFBlR721gf 71ovhXRSBz8hKND5Ep4xxKgj+zSbGJHDoJWGJx2RpJjjtM4MZ60Y2X3hZow93JbisCca otL2/JvHP2pEjYmMWCHeTTWCIFxEf5+jjt6uLod9h6+y0FXWH4MjAD2OXM8r1+w0BpK2 Z3/o+bYolq5z/si0f/i/I+Bm6yZwMmxoKaa86Wv8JcR5EbEdi3exmxaCM9HzJv6VWoSx gYn3LmBMZeel3l1iLJZ+ZQD7bYQqseAhja+lA7AtKcsl4WYwwAx33TxT6m+1mUxT/qtr +MrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jhOZCCCBqKuLxWy2mIf6Yw4rqrpRNhf8GEv9RArROxI=; b=I9OySl8ziDSFessszBh7fGkz9IFTox/IwHs+XWmvjPF03SAW2dPvi4BxfT6RrfI7QC F3tMS5h0svAjVgtf8DXLT8zcM9u0HaOHzeccAEfvSTCRR+dzI6OzdRTnhAgwQi9O/2IN hMqvAMD66QcBvNxHtUyLgcCoTS89msmAXuC9eYXZnQXtzRnxl9SZ3jIzxvbBek2rcJdJ ds7IHE1AazzGQbcFi9zf4iS4DZhneWYOVGjsg2dGXM/DwvvD1LzwCF4mQZoksfhr24tm wnppuZEfUz9Ds9pz7DronmGuOIr+h5xbOWY/KnOrSqDTyVPNyzPcSYlN/dVsKDaZ0HNS n+CA== X-Gm-Message-State: ALoCoQlquGwGox5j2BYMSC3UvPAiDXSoaOGTFAzWwP2G7P5QYLQf3ibxmwxqec4ReEEd6nVMdClY X-Received: by 10.98.17.131 with SMTP id 3mr17480877pfr.57.1449191101577; Thu, 03 Dec 2015 17:05:01 -0800 (PST) Received: from xeon-e3.home.lan (static-50-53-82-155.bvtn.or.frontiernet.net. [50.53.82.155]) by smtp.gmail.com with ESMTPSA id 6sm13060124pfm.58.2015.12.03.17.04.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 03 Dec 2015 17:04:58 -0800 (PST) From: Stephen Hemminger To: yongwang@vmware.com Date: Thu, 3 Dec 2015 17:05:06 -0800 Message-Id: <1449191107-14222-3-git-send-email-stephen@networkplumber.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1449191107-14222-1-git-send-email-stephen@networkplumber.org> References: <1449191107-14222-1-git-send-email-stephen@networkplumber.org> Cc: dev@dpdk.org, "Charles \(Chas\) Williams" Subject: [dpdk-dev] [PATCH 2/3] vmxnet3: don't clear vf_table on restart X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: "Charles (Chas) Williams" From: Charles (Chas) Williams During an MTU change, the adapter is restarted. If hardware VLAN offload is in use, this existing filter table would also be cleared. Instead, setup the shadow table once during device initialization and just update during restart. Signed-off-by: Charles (Chas) Williams Signed-off-by: Stephen Hemminger Acked-by: Yong Wang --- drivers/net/vmxnet3/vmxnet3_ethdev.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/drivers/net/vmxnet3/vmxnet3_ethdev.c b/drivers/net/vmxnet3/vmxnet3_ethdev.c index c363bf6..2d7bf13 100644 --- a/drivers/net/vmxnet3/vmxnet3_ethdev.c +++ b/drivers/net/vmxnet3/vmxnet3_ethdev.c @@ -89,8 +89,8 @@ static void vmxnet3_dev_info_get(struct rte_eth_dev *dev, static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on); static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); -static void vmxnet3_dev_vlan_offload_set_clear(struct rte_eth_dev *dev, - int mask, int clear); +static void vmxnet3_dev_vlan_offload_update(struct rte_eth_dev *dev, + int mask); #if PROCESS_SYS_EVENTS == 1 static void vmxnet3_process_events(struct vmxnet3_hw *); @@ -294,6 +294,9 @@ eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev) /* Put device in Quiesce Mode */ VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV); + /* allow untagged pkts */ + VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0); + return 0; } @@ -518,7 +521,7 @@ vmxnet3_setup_driver_shared(struct rte_eth_dev *dev) if (dev->data->dev_conf.rxmode.hw_vlan_filter) mask |= ETH_VLAN_FILTER_MASK; - vmxnet3_dev_vlan_offload_set_clear(dev, mask, 1); + vmxnet3_dev_vlan_offload_update(dev, mask); PMD_INIT_LOG(DEBUG, "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x", @@ -835,8 +838,7 @@ vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on) } static void -vmxnet3_dev_vlan_offload_set_clear(struct rte_eth_dev *dev, - int mask, int clear) +vmxnet3_dev_vlan_offload_update(struct rte_eth_dev *dev, int mask) { struct vmxnet3_hw *hw = dev->data->dev_private; Vmxnet3_DSDevRead *devRead = &hw->shared->devRead; @@ -851,17 +853,8 @@ vmxnet3_dev_vlan_offload_set_clear(struct rte_eth_dev *dev, VMXNET3_CMD_UPDATE_FEATURE); if (mask & ETH_VLAN_FILTER_MASK) { - if (clear) { - memset(hw->shadow_vfta, 0, - VMXNET3_VFT_TABLE_SIZE); - /* allow untagged pkts */ - VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0); - } memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE); } else { - /* allow any pkts -- no filtering */ - if (clear) - memset(hw->shadow_vfta, 0xff, VMXNET3_VFT_TABLE_SIZE); memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE); } @@ -872,7 +865,7 @@ vmxnet3_dev_vlan_offload_set_clear(struct rte_eth_dev *dev, static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) { - vmxnet3_dev_vlan_offload_set_clear(dev, mask, 0); + vmxnet3_dev_vlan_offload_update(dev, mask); } #if PROCESS_SYS_EVENTS == 1