From patchwork Fri Nov 13 09:35:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Marchand X-Patchwork-Id: 8905 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 00459939E; Fri, 13 Nov 2015 10:35:35 +0100 (CET) Received: from mail-wm0-f47.google.com (mail-wm0-f47.google.com [74.125.82.47]) by dpdk.org (Postfix) with ESMTP id C2528939A for ; Fri, 13 Nov 2015 10:35:33 +0100 (CET) Received: by wmvv187 with SMTP id v187so72274885wmv.1 for ; Fri, 13 Nov 2015 01:35:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind_com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KhI0m244KN2oVKfrV1/Np/eMEruvHtoFxDip2t4GWyk=; b=2P39aEm2NUIGt60CgAqbXHPrvh0w1p/QKJI3uaLl5P5DcbrJWX1iT6qKiwJLxOeB6Y cbV4TGq3nboExiVOr4Lum5EAg57N/ppjbGtOlxR0pmwrBgKKSlUdLnJ1hb3kH9ZIbhTj veiqXC+iNC4vZVeu9PjmjDIK03ZgD2VP9tlSWW2/D0yo811Nojxn7r6AV3ZQpnKB1y7a d6eEsfOxO/QiwKPz7yTEGIagzIgYfafhl8vYtwol6s++b4KaVFvaMJUnvbBwYfu4B6Ri c/pcP6VkUEx6SiPAPSzJ2w48ywS1qatDDVIXmrqz6UyvJYnfDmVWx1sJcbX4sfZOXUtV lboQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KhI0m244KN2oVKfrV1/Np/eMEruvHtoFxDip2t4GWyk=; b=KoijVC35QTVc6Ow0U3jeT6VrEiNk6OWGPz+MtpGjNTjW2I5rALFPJO9Cdmfob3rqLc 9Tpf3IgWp9EDja4aTSqYtJqPhQ7Crj/X+hdJv4QGZsHIdcXysJ2z2ZdD2rrenfkHM1mS bTWmSbY09qoJK22YmrfbhLNIUnt1CKfwMM5hKOIZWgsZinwxGUroTdSefFkCwlpLguBt FDyB0JTHd7O7hjoBaJOJUOceAScFc+cfj0ixXpe++ECO+NQtzvQccCtGyHNePIndlTqs wOrZMGW0gXBo5swSQvLE5YuN1LZDi5Xjv+OVkzxcVgzvpdsbtNrQdjiOgCNKXm5RB0Rp N54A== X-Gm-Message-State: ALoCoQmKenPnGtqhj9pZk8Hr+R9ZApARj1MMfWlQ4Gdf1V0sxhs5rNVqBqB3FuBxrm0tXRCG999W X-Received: by 10.194.142.45 with SMTP id rt13mr23777526wjb.45.1447407333551; Fri, 13 Nov 2015 01:35:33 -0800 (PST) Received: from gloops.dev.6wind.com (89-158-215-180.rev.numericable.fr. [89.158.215.180]) by smtp.gmail.com with ESMTPSA id c4sm7277993wjs.36.2015.11.13.01.35.32 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Nov 2015 01:35:32 -0800 (PST) From: David Marchand To: dev@dpdk.org Date: Fri, 13 Nov 2015 10:35:25 +0100 Message-Id: <1447407326-13446-1-git-send-email-david.marchand@6wind.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1435927863-3398-2-git-send-email-joongi@an.kaist.ac.kr> References: <1435927863-3398-2-git-send-email-joongi@an.kaist.ac.kr> Subject: [dpdk-dev] [PATCH 1/2] Revert "eal: fix C++ app build" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This reverts commit 621389bbbe0860d41538aeac893b6d74e714530c. Signed-off-by: David Marchand --- lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h | 4 ++-- lib/librte_eal/common/include/arch/tile/rte_cpuflags.h | 4 ++-- lib/librte_eal/common/include/arch/x86/rte_cpuflags.h | 4 ++-- lib/librte_eal/common/include/generic/rte_cpuflags.h | 12 ++---------- 4 files changed, 8 insertions(+), 16 deletions(-) diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h b/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h index f1cfc4f..df45047 100644 --- a/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h @@ -49,7 +49,7 @@ extern "C" { #define AT_HWCAP2 26 /* software based registers */ -enum cpu_register_t __RTE_REGISTER_UNDERLYING_TYPE { +enum cpu_register_t { REG_HWCAP = 0, REG_HWCAP2, }; @@ -57,7 +57,7 @@ enum cpu_register_t __RTE_REGISTER_UNDERLYING_TYPE { /** * Enumeration of all CPU features supported */ -enum rte_cpu_flag_t __RTE_CPUFLAG_UNDERLYING_TYPE { +enum rte_cpu_flag_t { RTE_CPUFLAG_PPC_LE = 0, RTE_CPUFLAG_TRUE_LE, RTE_CPUFLAG_PSERIES_PERFMON_COMPAT, diff --git a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h index d6696d3..08aa957 100644 --- a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h +++ b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h @@ -45,14 +45,14 @@ extern "C" { #include "generic/rte_cpuflags.h" /* software based registers */ -enum cpu_register_t __RTE_REGISTER_UNDERLYING_TYPE { +enum cpu_register_t { REG_DUMMY = 0 }; /** * Enumeration of all CPU features supported */ -enum rte_cpu_flag_t __RTE_CPUFLAG_UNDERLYING_TYPE { +enum rte_cpu_flag_t { RTE_CPUFLAG_NUMFLAGS /**< This should always be the last! */ }; diff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h index df1834c..dd56553 100644 --- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h +++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h @@ -45,7 +45,7 @@ extern "C" { #include "generic/rte_cpuflags.h" -enum rte_cpu_flag_t __RTE_CPUFLAG_UNDERLYING_TYPE { +enum rte_cpu_flag_t { /* (EAX 01h) ECX features*/ RTE_CPUFLAG_SSE3 = 0, /**< SSE3 */ RTE_CPUFLAG_PCLMULQDQ, /**< PCLMULQDQ */ @@ -150,7 +150,7 @@ enum rte_cpu_flag_t __RTE_CPUFLAG_UNDERLYING_TYPE { RTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */ }; -enum cpu_register_t __RTE_REGISTER_UNDERLYING_TYPE { +enum cpu_register_t { RTE_REG_EAX = 0, RTE_REG_EBX, RTE_REG_ECX, diff --git a/lib/librte_eal/common/include/generic/rte_cpuflags.h b/lib/librte_eal/common/include/generic/rte_cpuflags.h index 5352cbc..61c4db1 100644 --- a/lib/librte_eal/common/include/generic/rte_cpuflags.h +++ b/lib/librte_eal/common/include/generic/rte_cpuflags.h @@ -44,23 +44,15 @@ #include #include -#ifdef __cplusplus -#define __RTE_CPUFLAG_UNDERLYING_TYPE : unsigned int -#define __RTE_REGISTER_UNDERLYING_TYPE : unsigned int -#else -#define __RTE_CPUFLAG_UNDERLYING_TYPE -#define __RTE_REGISTER_UNDERLYING_TYPE -#endif - /** * Enumeration of all CPU features supported */ -enum rte_cpu_flag_t __RTE_CPUFLAG_UNDERLYING_TYPE; +enum rte_cpu_flag_t; /** * Enumeration of CPU registers */ -enum cpu_register_t __RTE_REGISTER_UNDERLYING_TYPE; +enum cpu_register_t; typedef uint32_t cpuid_registers_t[4];