From patchwork Fri Oct 30 05:27:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cunming Liang X-Patchwork-Id: 8311 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id A987B8E6C; Fri, 30 Oct 2015 06:28:15 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id BD8FC8DA8 for ; Fri, 30 Oct 2015 06:28:12 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 29 Oct 2015 22:28:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,217,1444719600"; d="scan'208";a="674833120" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga003.jf.intel.com with ESMTP; 29 Oct 2015 22:28:06 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t9U5S4nj023266; Fri, 30 Oct 2015 13:28:04 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t9U5S1vD028877; Fri, 30 Oct 2015 13:28:03 +0800 Received: (from cliang18@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9U5S1k2028873; Fri, 30 Oct 2015 13:28:01 +0800 From: Cunming Liang To: dev@dpdk.org Date: Fri, 30 Oct 2015 13:27:44 +0800 Message-Id: <1446182873-28814-3-git-send-email-cunming.liang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1446182873-28814-1-git-send-email-cunming.liang@intel.com> References: <1443072831-19065-1-git-send-email-cunming.liang@intel.com> <1446182873-28814-1-git-send-email-cunming.liang@intel.com> Subject: [dpdk-dev] [PATCH v2 02/11] ixgbe: reserve intr vector zero for misc cause X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" According to the VFIO interrupt mapping, the interrupt vector id for rxq starts from RX_VEC_START. It doesn't impact the UIO cases. Signed-off-by: Cunming Liang --- drivers/net/ixgbe/ixgbe_ethdev.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 4373661..4e1467c 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -4275,7 +4275,8 @@ ixgbe_configure_msix(struct rte_eth_dev *dev) struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle; struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); - uint32_t queue_id, vec = 0; + uint32_t queue_id, base = MISC_VEC_ID; + uint32_t vec = MISC_VEC_ID; uint32_t mask; uint32_t gpie; @@ -4285,6 +4286,9 @@ ixgbe_configure_msix(struct rte_eth_dev *dev) if (!rte_intr_dp_is_en(intr_handle)) return; + if (rte_intr_allow_others(intr_handle)) + vec = base = RX_VEC_START; + /* setup GPIE for MSI-x mode */ gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); gpie |= IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT | @@ -4308,23 +4312,23 @@ ixgbe_configure_msix(struct rte_eth_dev *dev) /* by default, 1:1 mapping */ ixgbe_set_ivar_map(hw, 0, queue_id, vec); intr_handle->intr_vec[queue_id] = vec; - if (vec < intr_handle->nb_efd - 1) + if (vec < base + intr_handle->nb_efd - 1) vec++; } switch (hw->mac.type) { case ixgbe_mac_82598EB: ixgbe_set_ivar_map(hw, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX, - intr_handle->max_intr - 1); + MISC_VEC_ID); break; case ixgbe_mac_82599EB: case ixgbe_mac_X540: - ixgbe_set_ivar_map(hw, -1, 1, intr_handle->max_intr - 1); + ixgbe_set_ivar_map(hw, -1, 1, MISC_VEC_ID); break; default: break; } - IXGBE_WRITE_REG(hw, IXGBE_EITR(queue_id), + IXGBE_WRITE_REG(hw, IXGBE_EITR(MISC_VEC_ID), IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT & 0xFFF); /* set up to autoclear timer, and the vectors */