From patchwork Mon Oct 12 16:45:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Van Haaren, Harry" X-Patchwork-Id: 7546 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id D18FE8E8F; Mon, 12 Oct 2015 18:45:54 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 7D94B8E6C for ; Mon, 12 Oct 2015 18:45:51 +0200 (CEST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 12 Oct 2015 09:45:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,673,1437462000"; d="scan'208";a="809174194" Received: from sie-lab-212-222.ir.intel.com (HELO silpixa00366884.ir.intel.com) ([10.237.212.222]) by fmsmga001.fm.intel.com with ESMTP; 12 Oct 2015 09:45:50 -0700 From: Harry van Haaren To: dev@dpdk.org Date: Mon, 12 Oct 2015 17:45:33 +0100 Message-Id: <1444668333-20191-3-git-send-email-harry.van.haaren@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1444668333-20191-1-git-send-email-harry.van.haaren@intel.com> References: <561BD4AE.4010704@gmail.com> <1444668333-20191-1-git-send-email-harry.van.haaren@intel.com> Subject: [dpdk-dev] [PATCH 2/2] igb: fix VF statistic wraparound handling macro X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Fix a misinterpreatation of VF statistic macro in e1000/igb. Signed-off-by: Harry van Haaren Acked-by: Roger Melton --- drivers/net/e1000/igb_ethdev.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index 848ef6e..e4911fc 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -246,11 +246,10 @@ static void eth_igb_configure_msix_intr(struct rte_eth_dev *dev); #define UPDATE_VF_STAT(reg, last, cur) \ { \ u32 latest = E1000_READ_REG(hw, reg); \ - cur += latest - last; \ + cur += (latest-last) & UINT_MAX; \ last = latest; \ } - #define IGB_FC_PAUSE_TIME 0x0680 #define IGB_LINK_UPDATE_CHECK_TIMEOUT 90 /* 9s */ #define IGB_LINK_UPDATE_CHECK_INTERVAL 100 /* ms */