diff --git a/drivers/net/fm10k/base/fm10k_osdep.h b/drivers/net/fm10k/base/fm10k_osdep.h
index 53c433c..64f09dc 100644
--- a/drivers/net/fm10k/base/fm10k_osdep.h
+++ b/drivers/net/fm10k/base/fm10k_osdep.h
@@ -106,6 +106,7 @@ typedef int        bool;
 #define FM10K_LE32_TO_CPU    rte_le_to_cpu_32
 #define FM10K_CPU_TO_LE32    rte_cpu_to_le_32
 #define FM10K_CPU_TO_LE16    rte_cpu_to_le_16
+#define le16_to_cpu          rte_le_to_cpu_16
 
 #define FM10K_RMB            rte_rmb
 #define FM10K_WMB            rte_wmb
diff --git a/drivers/net/fm10k/base/fm10k_pf.c b/drivers/net/fm10k/base/fm10k_pf.c
index 0526077..396a2e0 100644
--- a/drivers/net/fm10k/base/fm10k_pf.c
+++ b/drivers/net/fm10k/base/fm10k_pf.c
@@ -1852,6 +1852,48 @@ const struct fm10k_tlv_attr fm10k_1588_timestamp_msg_attr[] = {
 	FM10K_TLV_ATTR_LAST
 };
 
+const struct fm10k_tlv_attr fm10k_1588_clock_owner_attr[] = {
+	FM10K_TLV_ATTR_LE_STRUCT(FM10K_PF_ATTR_ID_1588_CLOCK_OWNER,
+				 sizeof(struct fm10k_swapi_1588_clock_owner)),
+	FM10K_TLV_ATTR_LAST
+};
+
+/**
+ *  fm10k_msg_1588_clock_owner_pf - Message handler for clock ownership from SM
+ *  @hw: pointer to hardware structure
+ *  @results: pointer to array containing parsed data,
+ *  @mbx: Pointer to mailbox information structure
+ *
+ *  This handler configures the FM10K_HW_FLAG_CLOCK_OWNER field for the PF
+ */
+s32 fm10k_msg_1588_clock_owner_pf(struct fm10k_hw *hw, u32 **results,
+				  struct fm10k_mbx_info *mbx)
+{
+	struct fm10k_swapi_1588_clock_owner msg;
+	u16 glort;
+	s32 err;
+
+	UNREFERENCED_1PARAMETER(mbx);
+	DEBUGFUNC("fm10k_msg_1588_clock_owner");
+
+	err = fm10k_tlv_attr_get_le_struct(
+		results[FM10K_PF_ATTR_ID_1588_CLOCK_OWNER],
+		&msg, sizeof(msg));
+	if (err)
+		return err;
+
+	/* We own the clock iff the glort matches us and the enabled field is
+	 * true. Otherwise, the clock must belong to some other port.
+	 */
+	glort = le16_to_cpu(msg.glort);
+	if (fm10k_glort_valid_pf(hw, glort) && msg.enabled)
+		hw->flags |= FM10K_HW_FLAG_CLOCK_OWNER;
+	else
+		hw->flags &= ~FM10K_HW_FLAG_CLOCK_OWNER;
+
+	return FM10K_SUCCESS;
+}
+
 /**
  *  fm10k_adjust_systime_pf - Adjust systime frequency
  *  @hw: pointer to hardware structure
@@ -1871,6 +1913,10 @@ STATIC s32 fm10k_adjust_systime_pf(struct fm10k_hw *hw, s32 ppb)
 
 	DEBUGFUNC("fm10k_adjust_systime_vf");
 
+	/* ensure that we control the clock */
+	if (!(hw->flags & FM10K_HW_FLAG_CLOCK_OWNER))
+		return FM10K_ERR_DEVICE_NOT_SUPPORTED;
+
 	/* if sw_addr is not set we don't have switch register access */
 	if (!hw->sw_addr)
 		return ppb ? FM10K_ERR_PARAM : FM10K_SUCCESS;
@@ -1936,6 +1982,7 @@ static const struct fm10k_msg_data fm10k_msg_data_pf[] = {
 	FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf),
 	FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf),
 	FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_msg_update_pvid_pf),
+	FM10K_PF_MSG_1588_CLOCK_OWNER_HANDLER(fm10k_msg_1588_clock_owner_pf),
 	FM10K_TLV_MSG_ERROR_HANDLER(fm10k_tlv_msg_error),
 };
 
diff --git a/drivers/net/fm10k/base/fm10k_pf.h b/drivers/net/fm10k/base/fm10k_pf.h
index dd25c49..ae8a737 100644
--- a/drivers/net/fm10k/base/fm10k_pf.h
+++ b/drivers/net/fm10k/base/fm10k_pf.h
@@ -57,6 +57,7 @@ enum fm10k_pf_tlv_msg_id_v1 {
 	FM10K_PF_MSG_ID_SET_FLOW_STATE		= 0x505,
 	FM10K_PF_MSG_ID_GET_1588_INFO		= 0x506,
 	FM10K_PF_MSG_ID_1588_TIMESTAMP		= 0x701,
+	FM10K_PF_MSG_ID_1588_CLOCK_OWNER	= 0x702,
 };
 
 enum fm10k_pf_tlv_attr_id_v1 {
@@ -75,6 +76,7 @@ enum fm10k_pf_tlv_attr_id_v1 {
 	FM10K_PF_ATTR_ID_PORT			= 0x0C,
 	FM10K_PF_ATTR_ID_UPDATE_PVID		= 0x0D,
 	FM10K_PF_ATTR_ID_1588_TIMESTAMP		= 0x10,
+	FM10K_PF_ATTR_ID_1588_CLOCK_OWNER	= 0x12,
 };
 
 #define FM10K_MSG_LPORT_MAP_GLORT_SHIFT	0
@@ -125,6 +127,10 @@ struct fm10k_swapi_1588_timestamp {
 	__le16 sglort;
 };
 
+struct fm10k_swapi_1588_clock_owner {
+	__le16 glort;
+	__le16 enabled;
+};
 
 #ifdef C99
 #pragma pack(pop)
@@ -158,6 +164,13 @@ extern const struct fm10k_tlv_attr fm10k_1588_timestamp_msg_attr[];
 	FM10K_MSG_HANDLER(FM10K_PF_MSG_ID_1588_TIMESTAMP, \
 			  fm10k_1588_timestamp_msg_attr, func)
 
+s32 fm10k_msg_1588_clock_owner_pf(struct fm10k_hw *, u32 **,
+				  struct fm10k_mbx_info *);
+extern const struct fm10k_tlv_attr fm10k_1588_clock_owner_attr[];
+#define FM10K_PF_MSG_1588_CLOCK_OWNER_HANDLER(func) \
+	FM10K_MSG_HANDLER(FM10K_PF_MSG_ID_1588_CLOCK_OWNER, \
+			  fm10k_1588_clock_owner_attr, func)
+
 s32 fm10k_iov_msg_msix_pf(struct fm10k_hw *, u32 **, struct fm10k_mbx_info *);
 s32 fm10k_iov_msg_mac_vlan_pf(struct fm10k_hw *, u32 **,
 			      struct fm10k_mbx_info *);
diff --git a/drivers/net/fm10k/base/fm10k_type.h b/drivers/net/fm10k/base/fm10k_type.h
index 7fdf8a4..e0fc08d 100644
--- a/drivers/net/fm10k/base/fm10k_type.h
+++ b/drivers/net/fm10k/base/fm10k_type.h
@@ -805,6 +805,8 @@ struct fm10k_hw {
 	u16 subsystem_device_id;
 	u16 subsystem_vendor_id;
 	u8 revision_id;
+	u32 flags;
+#define FM10K_HW_FLAG_CLOCK_OWNER	(u32)(1 << 0)
 };
 
 /* Number of Transmit and Receive Descriptors must be a multiple of 8 */
