From patchwork Fri Jun 5 15:19:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John McNamara X-Patchwork-Id: 5213 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 29E05C342; Fri, 5 Jun 2015 17:20:11 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id EF646C340 for ; Fri, 5 Jun 2015 17:20:09 +0200 (CEST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP; 05 Jun 2015 08:20:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,559,1427785200"; d="scan'208";a="705962432" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga001.jf.intel.com with ESMTP; 05 Jun 2015 08:20:09 -0700 Received: from sivswdev02.ir.intel.com (sivswdev02.ir.intel.com [10.237.217.46]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id t55FK7Th020448; Fri, 5 Jun 2015 16:20:07 +0100 Received: from sivswdev02.ir.intel.com (localhost [127.0.0.1]) by sivswdev02.ir.intel.com with ESMTP id t55FK7Fk019722; Fri, 5 Jun 2015 16:20:07 +0100 Received: (from jmcnam2x@localhost) by sivswdev02.ir.intel.com with id t55FK7XD019718; Fri, 5 Jun 2015 16:20:07 +0100 From: John McNamara To: dev@dpdk.org Date: Fri, 5 Jun 2015 16:19:05 +0100 Message-Id: <1433517547-19537-3-git-send-email-john.mcnamara@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1433517547-19537-1-git-send-email-john.mcnamara@intel.com> References: <1433517547-19537-1-git-send-email-john.mcnamara@intel.com> Subject: [dpdk-dev] [PATCH 2/4] e1000: add support for ieee1588 timestamping X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add e1000/igb support for new ethdev APIs to enable and read IEEE1588 PTP timestamps. Signed-off-by: John McNamara --- drivers/net/e1000/igb_ethdev.c | 118 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 118 insertions(+) diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index e4b370d..f4e5527 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -74,6 +74,12 @@ #define IGB_8_BIT_WIDTH CHAR_BIT #define IGB_8_BIT_MASK UINT8_MAX +/* IEEE1588 additional values. */ +#define E1000_ETQF_FILTER_1588 3 +#define E1000_TIMINCA_INCVALUE 16000000 +#define E1000_TIMINCA_INIT ((0x02 << E1000_TIMINCA_16NS_SHIFT) \ + | E1000_TIMINCA_INCVALUE) + static int eth_igb_configure(struct rte_eth_dev *dev); static int eth_igb_start(struct rte_eth_dev *dev); static void eth_igb_stop(struct rte_eth_dev *dev); @@ -194,6 +200,13 @@ static int eth_igb_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_op filter_op, void *arg); +static int igb_ieee1588_enable(struct rte_eth_dev *dev); +static int igb_ieee1588_disable(struct rte_eth_dev *dev); +static int igb_ieee1588_read_rx_timestamp(struct rte_eth_dev *dev, + struct timespec *timestamp); +static int igb_ieee1588_read_tx_timestamp(struct rte_eth_dev *dev, + struct timespec *timestamp); + /* * Define VF Stats MACRO for Non "cleared on read" register */ @@ -269,6 +282,10 @@ static const struct eth_dev_ops eth_igb_ops = { .rss_hash_update = eth_igb_rss_hash_update, .rss_hash_conf_get = eth_igb_rss_hash_conf_get, .filter_ctrl = eth_igb_filter_ctrl, + .ieee1588_enable = igb_ieee1588_enable, + .ieee1588_disable = igb_ieee1588_disable, + .ieee1588_read_rx_timestamp = igb_ieee1588_read_rx_timestamp, + .ieee1588_read_tx_timestamp = igb_ieee1588_read_tx_timestamp, }; /* @@ -3642,6 +3659,107 @@ eth_igb_filter_ctrl(struct rte_eth_dev *dev, return ret; } +static int +igb_ieee1588_enable(struct rte_eth_dev *dev) +{ + struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t tsync_ctl; + + /* Start incrementing the System Time registers used to timestamp PTP + * packets. + */ + E1000_WRITE_REG(hw, E1000_TIMINCA, E1000_TIMINCA_INIT); + + /* Enable L2 filtering of IEEE1588 Ethernet frame types. */ + E1000_WRITE_REG(hw, E1000_ETQF(E1000_ETQF_FILTER_1588), + (ETHER_TYPE_1588 | + E1000_ETQF_FILTER_ENABLE | + E1000_ETQF_1588)); + + /* Enable timestamping of received PTP packets. */ + tsync_ctl = E1000_READ_REG(hw, E1000_TSYNCRXCTL); + tsync_ctl |= E1000_TSYNCRXCTL_ENABLED; + + E1000_WRITE_REG(hw, E1000_TSYNCRXCTL, tsync_ctl); + + /* Enable Timestamping of transmitted PTP packets. */ + tsync_ctl = E1000_READ_REG(hw, E1000_TSYNCTXCTL); + tsync_ctl |= E1000_TSYNCTXCTL_ENABLED; + + E1000_WRITE_REG(hw, E1000_TSYNCTXCTL, tsync_ctl); + + return 0; +} + +static int +igb_ieee1588_disable(struct rte_eth_dev *dev) +{ + struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t tsync_ctl; + + /* Disable Timestamping of transmitted PTP packets. */ + tsync_ctl = E1000_READ_REG(hw, E1000_TSYNCTXCTL); + tsync_ctl &= ~E1000_TSYNCTXCTL_ENABLED; + + E1000_WRITE_REG(hw, E1000_TSYNCTXCTL, tsync_ctl); + + /* Disable timestamping of received PTP packets. */ + tsync_ctl = E1000_READ_REG(hw, E1000_TSYNCRXCTL); + tsync_ctl &= ~E1000_TSYNCRXCTL_ENABLED; + + E1000_WRITE_REG(hw, E1000_TSYNCRXCTL, tsync_ctl); + + /* Disable L2 filtering of IEEE1588 Ethernet frame types. */ + E1000_WRITE_REG(hw, E1000_ETQF(E1000_ETQF_FILTER_1588), 0); + + /* Stop incrementating the System Time registers. */ + E1000_WRITE_REG(hw, E1000_TIMINCA, 0); + + return 0; +} + +static int +igb_ieee1588_read_rx_timestamp(struct rte_eth_dev *dev, + struct timespec *timestamp) +{ + struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t tsync_rxctl; + uint32_t rx_stmpl; + uint32_t rx_stmph; + + tsync_rxctl = E1000_READ_REG(hw, E1000_TSYNCRXCTL); + if ((tsync_rxctl & 0x01) == 0) + return -EINVAL; + + rx_stmpl = E1000_READ_REG(hw, E1000_RXSTMPL); + rx_stmph = E1000_READ_REG(hw, E1000_RXSTMPH); + timestamp->tv_sec = (uint64_t)(((uint64_t)rx_stmph << 32) | rx_stmpl); + timestamp->tv_nsec = 0; + + return 0; +} + +static int +igb_ieee1588_read_tx_timestamp(struct rte_eth_dev *dev, + struct timespec *timestamp) +{ + struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t tsync_txctl; + uint32_t tx_stmpl; + uint32_t tx_stmph; + + tsync_txctl = E1000_READ_REG(hw, E1000_TSYNCTXCTL); + if ((tsync_txctl & 0x01) == 0) + return -EINVAL; + + tx_stmpl = E1000_READ_REG(hw, E1000_TXSTMPL); + tx_stmph = E1000_READ_REG(hw, E1000_TXSTMPH); + timestamp->tv_sec = (uint64_t)(((uint64_t)tx_stmph << 32) | tx_stmpl); + timestamp->tv_nsec = 0; + + return 0; +} + static struct rte_driver pmd_igb_drv = { .type = PMD_PDEV, .init = rte_igb_pmd_init,