From patchwork Fri Feb 20 16:59:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 3570 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 5AA83B7D5; Fri, 20 Feb 2015 17:59:27 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 04CD5B7A5 for ; Fri, 20 Feb 2015 17:59:21 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 20 Feb 2015 08:59:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,615,1418112000"; d="scan'208";a="688451874" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga002.jf.intel.com with ESMTP; 20 Feb 2015 08:59:20 -0800 Received: from sivswdev01.ir.intel.com (sivswdev01.ir.intel.com [10.237.217.45]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id t1KGxH9C031944; Fri, 20 Feb 2015 16:59:18 GMT Received: from sivswdev01.ir.intel.com (localhost [127.0.0.1]) by sivswdev01.ir.intel.com with ESMTP id t1KGxHrL027462; Fri, 20 Feb 2015 16:59:17 GMT Received: (from bricha3@localhost) by sivswdev01.ir.intel.com with id t1KGxH4Y027458; Fri, 20 Feb 2015 16:59:17 GMT From: Bruce Richardson To: dev@dpdk.org Date: Fri, 20 Feb 2015 16:59:15 +0000 Message-Id: <1424451557-27419-2-git-send-email-bruce.richardson@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1424451557-27419-1-git-send-email-bruce.richardson@intel.com> References: <1424365731-32228-1-git-send-email-danny.zhou@intel.com> <1424451557-27419-1-git-send-email-bruce.richardson@intel.com> Subject: [dpdk-dev] [PATCH v3 1/3] eal: enable uio_pci_generic support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Zhou Danny Change the EAL PCI code so that it can work with both the uio_pci_generic in-tree driver, as well as the igb_uio DPDK-specific driver. This involves changes to 1) Modify method of retrieving BAR resource mapping information 2) Mapping using resource files in /sys rather than /dev/uio* 2) Setup bus master bit in NIC's PCIe configuration space for uio_pci_generic. Signed-off-by: Danny Zhou Signed-off-by: Bruce Richardson --- v3 changes: - Remove the requirement for the kernel_driver_name to be stored for each device - Ensure greater commonality of code between uio_generic and igb_uio, by always checking if bus mastering is on, and always using resource0 for mmap. - Ensure secondary processes do not map resources unused in primary process v2 changes: - Change variable name of kernel driver with precise comment. - Fix a union definition error in v1 patchset. - Move redefined macro IORESOURCE_MEM to rte_pci.h with comment. --- lib/librte_eal/common/include/rte_pci.h | 3 + lib/librte_eal/linuxapp/eal/eal_pci.c | 4 +- lib/librte_eal/linuxapp/eal/eal_pci_uio.c | 167 ++++++++++----------- .../linuxapp/eal/include/exec-env/rte_interrupts.h | 8 +- 4 files changed, 91 insertions(+), 91 deletions(-) diff --git a/lib/librte_eal/common/include/rte_pci.h b/lib/librte_eal/common/include/rte_pci.h index 66ed793..4301c16 100644 --- a/lib/librte_eal/common/include/rte_pci.h +++ b/lib/librte_eal/common/include/rte_pci.h @@ -104,6 +104,9 @@ extern struct pci_device_list pci_device_list; /**< Global list of PCI devices. /** Nb. of values in PCI resource format. */ #define PCI_RESOURCE_FMT_NVAL 3 +/** IO resource type: memory address space */ +#define IORESOURCE_MEM 0x00000200 + /** * A structure describing a PCI resource. */ diff --git a/lib/librte_eal/linuxapp/eal/eal_pci.c b/lib/librte_eal/linuxapp/eal/eal_pci.c index 15db9c4..63bcbce 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci.c +++ b/lib/librte_eal/linuxapp/eal/eal_pci.c @@ -138,8 +138,6 @@ pci_map_resource(void *requested_addr, int fd, off_t offset, size_t size) } /* parse the "resource" sysfs file */ -#define IORESOURCE_MEM 0x00000200 - static int pci_parse_sysfs_resource(const char *filename, struct rte_pci_device *dev) { @@ -519,7 +517,7 @@ pci_map_device(struct rte_pci_device *dev) return ret; } #endif - /* map resources for devices that use igb_uio */ + /* map resources for devices that use uio_pci_generic or igb_uio */ if (!mapped) { ret = pci_uio_map_resource(dev); if (ret != 0) diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_uio.c b/lib/librte_eal/linuxapp/eal/eal_pci_uio.c index 54cce08..2b16fcb 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci_uio.c +++ b/lib/librte_eal/linuxapp/eal/eal_pci_uio.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include @@ -47,71 +48,73 @@ #include "eal_filesystem.h" #include "eal_pci_init.h" -static int pci_parse_sysfs_value(const char *filename, uint64_t *val); - void *pci_map_addr = NULL; #define OFF_MAX ((uint64_t)(off_t)-1) static int -pci_uio_get_mappings(const char *devname, struct pci_map maps[], int nb_maps) +pci_uio_get_mappings(struct rte_pci_device *dev, + struct pci_map maps[], int nb_maps) { - int i; - char dirname[PATH_MAX]; + struct rte_pci_addr *loc = &dev->addr; + int i = 0; char filename[PATH_MAX]; - uint64_t offset, size; + unsigned long long start_addr, end_addr, flags; + FILE *f; - for (i = 0; i != nb_maps; i++) { + snprintf(filename, sizeof(filename), + SYSFS_PCI_DEVICES "/" PCI_PRI_FMT "/resource", + loc->domain, loc->bus, loc->devid, loc->function); - /* check if map directory exists */ - snprintf(dirname, sizeof(dirname), - "%s/maps/map%u", devname, i); - - if (access(dirname, F_OK) != 0) - break; + f = fopen(filename, "r"); + if (f == NULL) { + RTE_LOG(ERR, EAL, + "%s(): cannot open sysfs %s\n", + __func__, filename); + return -1; + } - /* get mapping offset */ - snprintf(filename, sizeof(filename), - "%s/offset", dirname); - if (pci_parse_sysfs_value(filename, &offset) < 0) { - RTE_LOG(ERR, EAL, - "%s(): cannot parse offset of %s\n", - __func__, dirname); - return -1; + while (fscanf(f, "%llx %llx %llx", &start_addr, + &end_addr, &flags) == 3 && i < nb_maps) { + if (flags & IORESOURCE_MEM) { + maps[i].offset = 0x0; + maps[i].size = end_addr - start_addr + 1; + maps[i].phaddr = start_addr; + i++; } + } + fclose(f); - /* get mapping size */ - snprintf(filename, sizeof(filename), - "%s/size", dirname); - if (pci_parse_sysfs_value(filename, &size) < 0) { - RTE_LOG(ERR, EAL, - "%s(): cannot parse size of %s\n", - __func__, dirname); - return -1; - } + return i; +} - /* get mapping physical address */ - snprintf(filename, sizeof(filename), - "%s/addr", dirname); - if (pci_parse_sysfs_value(filename, &maps[i].phaddr) < 0) { - RTE_LOG(ERR, EAL, - "%s(): cannot parse addr of %s\n", - __func__, dirname); - return -1; - } +static int +pci_uio_set_bus_master(int dev_fd) +{ + uint16_t reg; + int ret; - if ((offset > OFF_MAX) || (size > SIZE_MAX)) { - RTE_LOG(ERR, EAL, - "%s(): offset/size exceed system max value\n", - __func__); - return -1; - } + ret = pread(dev_fd, ®, sizeof(reg), PCI_COMMAND); + if (ret != sizeof(reg)) { + RTE_LOG(ERR, EAL, + "Cannot read command from PCI config space!\n"); + return -1; + } + + /* return if bus mastering is already on */ + if (reg & PCI_COMMAND_MASTER) + return 0; + + reg |= PCI_COMMAND_MASTER; - maps[i].offset = offset; - maps[i].size = size; + ret = pwrite(dev_fd, ®, sizeof(reg), PCI_COMMAND); + if (ret != sizeof(reg)) { + RTE_LOG(ERR, EAL, + "Cannot write command to PCI config space!\n"); + return -1; } - return i; + return 0; } static int @@ -127,6 +130,10 @@ pci_uio_map_secondary(struct rte_pci_device *dev) continue; for (i = 0; i != uio_res->nb_maps; i++) { + /* ignore mappings unused in primary process */ + if (uio_res->maps[i].addr == NULL) + continue; + /* * open devname, to mmap it */ @@ -282,6 +289,7 @@ pci_uio_map_resource(struct rte_pci_device *dev) { int i, j; char dirname[PATH_MAX]; + char cfgname[PATH_MAX]; char devname[PATH_MAX]; /* contains the /dev/uioX */ void *mapaddr; int uio_num; @@ -294,6 +302,7 @@ pci_uio_map_resource(struct rte_pci_device *dev) struct pci_map *maps; dev->intr_handle.fd = -1; + dev->intr_handle.uio_cfg_fd = -1; dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN; /* secondary processes - use already recorded details */ @@ -318,6 +327,28 @@ pci_uio_map_resource(struct rte_pci_device *dev) } dev->intr_handle.type = RTE_INTR_HANDLE_UIO; + snprintf(cfgname, sizeof(cfgname), + "/sys/class/uio/uio%u/device/config", uio_num); + dev->intr_handle.uio_cfg_fd = open(cfgname, O_RDWR); + if (dev->intr_handle.uio_cfg_fd < 0) { + RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", + cfgname, strerror(errno)); + return -1; + } + + /* update devname for mmap */ + snprintf(devname, sizeof(devname), + SYSFS_PCI_DEVICES "/" PCI_PRI_FMT "/resource%d", + loc->domain, loc->bus, loc->devid, loc->function, 0); + + /* set bus master that is not done by uio_pci_generic */ + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { + if (pci_uio_set_bus_master(dev->intr_handle.uio_cfg_fd)) { + RTE_LOG(ERR, EAL, "Cannot set up bus mastering!\n"); + return -1; + } + } + /* allocate the mapping details for secondary processes*/ uio_res = rte_zmalloc("UIO_RES", sizeof(*uio_res), 0); if (uio_res == NULL) { @@ -330,13 +361,12 @@ pci_uio_map_resource(struct rte_pci_device *dev) memcpy(&uio_res->pci_addr, &dev->addr, sizeof(uio_res->pci_addr)); /* collect info about device mappings */ - nb_maps = pci_uio_get_mappings(dirname, uio_res->maps, - RTE_DIM(uio_res->maps)); + nb_maps = pci_uio_get_mappings(dev, uio_res->maps, + RTE_DIM(uio_res->maps)); if (nb_maps < 0) { rte_free(uio_res); return nb_maps; } - uio_res->nb_maps = nb_maps; /* Map all BARs */ @@ -403,38 +433,3 @@ pci_uio_map_resource(struct rte_pci_device *dev) return 0; } - -/* - * parse a sysfs file containing one integer value - * different to the eal version, as it needs to work with 64-bit values - */ -static int -pci_parse_sysfs_value(const char *filename, uint64_t *val) -{ - FILE *f; - char buf[BUFSIZ]; - char *end = NULL; - - f = fopen(filename, "r"); - if (f == NULL) { - RTE_LOG(ERR, EAL, "%s(): cannot open sysfs value %s\n", - __func__, filename); - return -1; - } - - if (fgets(buf, sizeof(buf), f) == NULL) { - RTE_LOG(ERR, EAL, "%s(): cannot read sysfs value %s\n", - __func__, filename); - fclose(f); - return -1; - } - *val = strtoull(buf, &end, 0); - if ((buf[0] == '\0') || (end == NULL) || (*end != '\n')) { - RTE_LOG(ERR, EAL, "%s(): cannot parse sysfs value %s\n", - __func__, filename); - fclose(f); - return -1; - } - fclose(f); - return 0; -} diff --git a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h index 23eafd9..6a159c7 100644 --- a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h +++ b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h @@ -50,8 +50,12 @@ enum rte_intr_handle_type { /** Handle for interrupts. */ struct rte_intr_handle { - int vfio_dev_fd; /**< VFIO device file descriptor */ - int fd; /**< file descriptor */ + union { + int vfio_dev_fd; /**< VFIO device file descriptor */ + int uio_cfg_fd; /**< UIO config file descriptor + for uio_pci_generic */ + }; + int fd; /**< interrupt event file descriptor */ enum rte_intr_handle_type type; /**< handle type */ };