From patchwork Tue Nov 18 17:04:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "De Lara Guarch, Pablo" X-Patchwork-Id: 1341 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 575277E75; Tue, 18 Nov 2014 17:58:28 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 484A37E70 for ; Tue, 18 Nov 2014 17:58:24 +0100 (CET) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 18 Nov 2014 09:07:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,410,1413270000"; d="scan'208";a="633970473" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by fmsmga002.fm.intel.com with ESMTP; 18 Nov 2014 09:04:56 -0800 Received: from sivswdev01.ir.intel.com (sivswdev01.ir.intel.com [10.237.217.45]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id sAIH4uR9017982; Tue, 18 Nov 2014 17:04:56 GMT Received: from sivswdev01.ir.intel.com (localhost [127.0.0.1]) by sivswdev01.ir.intel.com with ESMTP id sAIH4tAd003262; Tue, 18 Nov 2014 17:04:55 GMT Received: (from pdelarax@localhost) by sivswdev01.ir.intel.com with id sAIH4tNk003258; Tue, 18 Nov 2014 17:04:55 GMT From: Pablo de Lara To: dev@dpdk.org Date: Tue, 18 Nov 2014 17:04:51 +0000 Message-Id: <1416330293-2947-3-git-send-email-pablo.de.lara.guarch@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1416330293-2947-1-git-send-email-pablo.de.lara.guarch@intel.com> References: <1416078796-689-1-git-send-email-pablo.de.lara.guarch@intel.com> <1416330293-2947-1-git-send-email-pablo.de.lara.guarch@intel.com> Subject: [dpdk-dev] [PATCH v2 2/4] doc: Corrected info for tx_checksum set mask function, in testpmd UG X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" tx_checksum set mask function now allows 4 extra bits in the mask for TX checksum offload Signed-off-by: Pablo de Lara Acked-by: Bernard Iremonger --- doc/guides/testpmd_app_ug/testpmd_funcs.rst | 10 +++++++++- 1 files changed, 9 insertions(+), 1 deletions(-) diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst b/doc/guides/testpmd_app_ug/testpmd_funcs.rst index 8647227..cec99dc 100644 --- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst +++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst @@ -510,7 +510,7 @@ tx_vlan reset (port_id) tx_checksum set mask ~~~~~~~~~~~~~~~~~~~~ -Enable hardware insertion of checksum offload with a 4-bit mask, 0x0 - 0xF, in packets sent on a port: +Enable hardware insertion of checksum offload with a 8-bit mask, 0x0 - 0xFF, in packets sent on a port: tx_checksum set (mask) (port_id) @@ -524,6 +524,14 @@ bit 2 - if set insert tcp checksum offload bit 3 - if set insert sctp checksum offload +bit 4 - if set insert inner ip checksum offload + +bit 5 - if set insert inner udp checksum offload + +bit 6 - if set insert inner tcp checksum offload + +bit 7 - if set insert inner sctp checksum offload + .. note:: Check the NIC Datasheet for hardware limits.