From patchwork Thu Feb 29 19:45:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 725 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3391C43BA2; Thu, 29 Feb 2024 20:45:15 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EE87142DBD; Thu, 29 Feb 2024 20:45:14 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by mails.dpdk.org (Postfix) with ESMTP id ECCC2427DE for ; Thu, 29 Feb 2024 20:45:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709235914; x=1740771914; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nr4ZusIgZl7Og7ztv0xgARbUvYvUswNVj/vrmtnj2/Y=; b=RpWWUCdavgspmAqprx65dqSTaZGxTPGiZcSEp4zEjOMXEv7KQ0uk+9OB dXilGn9W/g2CL424BxEq33dIhtUsp2jtuYRO5Rj47IYJVn/JZZ1HZqFMi fZh/fBlVbd3uC6ZNVWe6nnOuWAsw3yNzqgaxyEImUtnljN5NR8OQG3/Ra RPlG3IBc3NzsWXNi4gcgNiSV+0Sep3+MQKS4QbkcU0s5F3gG5dreRLHL7 wsVHJL90Fw875PH3DFV4FSLFfODlnQ1fujZ4pC8nAOZ6/IlBzEjMIgdLC Qhd19lAvw/g/gnkEny3IbtU4PrU8A8Rf3SZWRzIS60J/IpLYgizPWaQJz Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10999"; a="21194784" X-IronPort-AV: E=Sophos;i="6.06,194,1705392000"; d="scan'208";a="21194784" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Feb 2024 11:45:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,194,1705392000"; d="scan'208";a="8180210" Received: from silpixa00401797.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.113]) by fmviesa006.fm.intel.com with ESMTP; 29 Feb 2024 11:45:11 -0800 From: Ciara Power To: dev@dpdk.org Cc: ciara.power@intel.com, kai.ji@intel.com, arkadiuszx.kusztal@intel.com, rakesh.s.joshi@intel.com, gakhil@marvell.com Subject: [PATCH v8 0/3] add QAT GEN LCE device Date: Thu, 29 Feb 2024 19:45:06 +0000 Message-Id: <20240229194510.2741004-1-ciara.power@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231220132616.318983-1-nishikanta.nayak@intel.com> References: <20231220132616.318983-1-nishikanta.nayak@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patchset adds a new QAT LCE device. The device currently only supports symmetric crypto, and only the AES-GCM algorithm. v8: Rebased on latest next-crypto-for-main. v7: - Squashed patch 1 and 2. - Fixed formatting to leverage 100 char line limit. - Removed unnecessary whitespace and indent changes. - Fixed copyright year typo on new file. - Added second developer to commit message signed-off tags. v6: - Added documentation and release note changes. - Removed unused device PCI ID. v5: - Fixed compilation issue by replacing __u8 with uint8_t. v4: - Fixed cover letter, v3 included the wrong details relating to another patchset. v3: - Fixed typos in commit and code comments. - Replaced use of linux/kernel.h macro with local macro to fix ARM compilation in CI. v2: - Renamed device from GEN 5 to GEN LCE. - Removed unused code. - Updated macro names. Nishikant Nayak (3): common/qat: add support for GEN LCE device crypto/qat: update headers for GEN LCE support test/cryptodev: add tests for GCM with 64 byte AAD .mailmap | 1 + app/test/test_cryptodev.c | 43 ++- app/test/test_cryptodev_aead_test_vectors.h | 62 ++++ doc/guides/cryptodevs/qat.rst | 1 + doc/guides/rel_notes/release_24_03.rst | 1 + drivers/common/qat/dev/qat_dev_gen_lce.c | 295 +++++++++++++++++ drivers/common/qat/meson.build | 2 + .../qat/qat_adf/adf_transport_access_macros.h | 1 + .../adf_transport_access_macros_gen_lce.h | 51 +++ .../adf_transport_access_macros_gen_lcevf.h | 48 +++ drivers/common/qat/qat_adf/icp_qat_fw.h | 34 ++ drivers/common/qat/qat_adf/icp_qat_fw_la.h | 59 +++- drivers/common/qat/qat_common.h | 1 + drivers/common/qat/qat_device.c | 5 + .../crypto/qat/dev/qat_crypto_pmd_gen_lce.c | 310 ++++++++++++++++++ drivers/crypto/qat/qat_sym.c | 14 +- drivers/crypto/qat/qat_sym.h | 57 +++- drivers/crypto/qat/qat_sym_session.c | 57 +++- drivers/crypto/qat/qat_sym_session.h | 10 +- 19 files changed, 1037 insertions(+), 15 deletions(-) create mode 100644 drivers/common/qat/dev/qat_dev_gen_lce.c create mode 100644 drivers/common/qat/qat_adf/adf_transport_access_macros_gen_lce.h create mode 100644 drivers/common/qat/qat_adf/adf_transport_access_macros_gen_lcevf.h create mode 100644 drivers/crypto/qat/dev/qat_crypto_pmd_gen_lce.c