From patchwork Sun Dec 3 11:25:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Baum X-Patchwork-Id: 451 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2F3564365F; Sun, 3 Dec 2023 12:26:22 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5F643402D4; Sun, 3 Dec 2023 12:26:16 +0100 (CET) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2059.outbound.protection.outlook.com [40.107.94.59]) by mails.dpdk.org (Postfix) with ESMTP id 2AEF94027B for ; Sun, 3 Dec 2023 12:26:14 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=PpRZu70XFi4A6Y1gHQ6IM6nt7bzoU99icLVzSO+SV0cSeZnid30RAJuerTvVNFr+wGzGIekhir6VXwdbk/Ioey5LUfCPPNTjrKmQ7SBSpjMpzG+GZIBBbKCuJt54rtL33plo2nRsj+yCeCQvLHj7zn+OxKGP/njxy2VN+qPCbsX/hzzw2amp4WcheB4qZg956N3Siu5+Ob8Gqm56D6ukT4QZDj7DU4Y78+elZmA3mbM8tYOCz/730CQ7uI/RZn0dBcjxB5/7eVmThyd7MtexdtIR/iSZ7SFqkNr54hKB95uAA2Tg3KSP/TYczvI+COEts/NeYlS73A6BekR6prxmZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=D40o5TQdlCwndy+CmVKzPWbXlmcz/7ZImyW1vhE8S7I=; b=KUJsXq6257lJb8gEY/6P0JPxplBynzidA1DhmF2jDaNkO7Ogdn6Ad4iNFbI/YST7jKRtKr+P26Uwf3dEmdF/bALd4RjUYnfkZVpUGfHoU3d7Ip/VUXvBY2SrGUtlvOdB14zg0Wwno0s82xYTab4qDwR3Av5kX6aZSmNBkNfi6Fme8/Nrc8EYX42rru1b1hQ5J/XGxPfZuyr9xJmLERTQ7XHEEXNpBsXokErBOpLWd39EuzjyWGs22stqnHbhBLiVk7GOqSdO7xQKXJo2XQ2e91Q27HMxAXfqaYocaNyquTp+hi3d9dOWoIPwm1yPIKyuyZ9ap8oN56YTnBSfMEwbvw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=D40o5TQdlCwndy+CmVKzPWbXlmcz/7ZImyW1vhE8S7I=; b=MvOsDO5FL6Rbp25rgLmvO4XPXYzhymH8DHQCW00LNVH7w0oZ8t4uM35Xo2durcKxoMQluWFLSbmfsYLH9sEj0lyYvxmZhhKAtUiIPTft8HZM1hiOGRAymyK89t1xfUvkoa3lCm7v8Zo0xsGbHuF7vDngCyI5/62bpUR1VmloA0EuVDNkc5N7ggq5ZErTbkT+b5tHpJ4/2XPpaBx0vHSG8OyQa42cNRq/yKnNRypqa7lCm7WyIuRubRVI7MFru8jck2vh7GgDrawqviyq5Qao848w0p+fOLlFrg15bxFdWPvGUXUR9rLty5poCz/bZEaX+Ad6gPF9MZzichyAhQ7TYg== Received: from MW4P222CA0004.NAMP222.PROD.OUTLOOK.COM (2603:10b6:303:114::9) by IA1PR12MB6580.namprd12.prod.outlook.com (2603:10b6:208:3a0::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7046.30; Sun, 3 Dec 2023 11:26:10 +0000 Received: from CO1PEPF000042AC.namprd03.prod.outlook.com (2603:10b6:303:114:cafe::7a) by MW4P222CA0004.outlook.office365.com (2603:10b6:303:114::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7046.32 via Frontend Transport; Sun, 3 Dec 2023 11:26:10 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1PEPF000042AC.mail.protection.outlook.com (10.167.243.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7068.20 via Frontend Transport; Sun, 3 Dec 2023 11:26:10 +0000 Received: from rnnvmail204.nvidia.com (10.129.68.6) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 3 Dec 2023 03:25:50 -0800 Received: from rnnvmail205.nvidia.com (10.129.68.10) by rnnvmail204.nvidia.com (10.129.68.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 3 Dec 2023 03:25:49 -0800 Received: from nvidia.com (10.127.8.13) by mail.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41 via Frontend Transport; Sun, 3 Dec 2023 03:25:48 -0800 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko , Ori Kam , Suanming Mou Subject: [PATCH v1 00/23] net/mlx5: support Geneve and options for HWS Date: Sun, 3 Dec 2023 13:25:20 +0200 Message-ID: <20231203112543.844014-1-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042AC:EE_|IA1PR12MB6580:EE_ X-MS-Office365-Filtering-Correlation-Id: 83d7ded6-4217-4859-6ae5-08dbf3f2a696 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ljx7w4/1l0K5OJIJ6crq69g4u/MIF6eegrQcesTH/LrETqH9prSSrA9gF2tATzeGpy3+YHNXSQhxbhRZLOhvjryoPqu/CYUq/cmcK1sQfq0ygWmdXValMqUCeVb072nN5P78pUAA/72ItBeFFZSkDl7+CezxCnGHjA1sxv4eg/BCuWSZi/aU3js8foX463cxr/Zn/Av08Eqh2TcBboJa30n9xEbm8f/cU39oUsWcUS106mmycPUDnMueYEWe1S3Wyzu406VmkcrQGUZOqcTUzEmp/ieip9lDiRLw3XILv/RXRartciqTK09kthChw4raqe77eQi3WoyLG4Ju+aYFMNTmatrdzdv7VPhCDzTCQPgNANc2zPLWxN4UU1zcU2GbEtNKdyFPjsbkHh5pISZ9tO6Z5qa8wtc+5Os3rLujWhskNaWDEO3dfk0+5tg17ex2zSetNs+KvFfcelwJpS6H6XuotENzXVFCy/d6m5N/bROjFG3CxYqeBC4LuzcElb5FcomRuIsQVAGcKOSu03oqT/SYYQdUk5PjME/U5hNwot5o7B2xPK3nBpIb2nCW6B4nnN25/PCATzPq0nKl8YF4BSjwmXuXhB8gibzDevrmlXmloJ84Qgta2tQoRyG8/Eyzt7g/wtK702m6TCMGju4ZreExCC8otaXUOjK1DLEoT89p6t8RRAKRmgJj4QB+NZxo/EIxksRxBU37vf4pRzC32JsVdM9LyPnPPgCr+tDOU80XA8O5scBygG7/I3ixJSx1 X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230031)(4636009)(376002)(346002)(396003)(136003)(39860400002)(230922051799003)(82310400011)(1800799012)(64100799003)(451199024)(186009)(40470700004)(46966006)(36840700001)(336012)(26005)(478600001)(83380400001)(7636003)(6286002)(47076005)(7696005)(6666004)(356005)(426003)(1076003)(40480700001)(82740400003)(36756003)(107886003)(2616005)(316002)(6916009)(54906003)(70586007)(70206006)(36860700001)(55016003)(5660300002)(4326008)(86362001)(8936002)(8676002)(2906002)(40460700003)(41300700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Dec 2023 11:26:10.4161 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 83d7ded6-4217-4859-6ae5-08dbf3f2a696 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AC.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6580 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add HWS support for both GENEVE and GENEVE TLV option headers. This patchset supports: - Add HW support for "RTE_FLOW_ITEM_TYPE_GENEVE" flow item. - Add HW support for "RTE_FLOW_ITEM_TYPE_GENEVE_OPT" flow item. - Add HW support for "RTE_FLOW_FIELD_GENEVE_VNI" for modify field flow action. - Add HW support for "RTE_FLOW_FIELD_GENEVE_OPT_TYPE" for modify field flow action. - Add HW support for "RTE_FLOW_FIELD_GENEVE_OPT_CLASS" for modify field flow action. - Add HW support for "RTE_FLOW_FIELD_GENEVE_OPT_DATA" for modify field flow action. The GENEVE TLV options support using flex parser. The profile should be specified to either 8 for multiple option or 0 for single option. A new API is added to create the GENEVE option parser before using it in templates API. Alex Vesker (4): net/mlx5/hws: fix tunnel protocol checks net/mlx5/hws: increase hl size for future compatibility net/mlx5/hws: support GENEVE matching net/mlx5/hws: support GENEVE options header Michael Baum (19): common/mlx5: fix duplicate read of general capabilities common/mlx5: fix query sample info capability net/mlx5: remove GENEVE options length limitation net/mlx5: fix GENEVE option item translation common/mlx5: add system image GUID attribute common/mlx5: add GENEVE TLV option attribute structure common/mlx5: add PRM attribute for TLV sample common/mlx5: add sample info query syndrome into error log common/mlx5: query GENEVE option sample ID from HCA attr common/mlx5: add function to query GENEVE TLV option net/mlx5: add physical device handle net/mlx5: add GENEVE TLV options parser API net/mlx5: add API to expose GENEVE option FW information net/mlx5: add testpmd support for GENEVE TLV parser net/mlx5: add support for GENEVE and option item in HWS net/mlx5: add GENEVE option support for profile 0 net/mlx5: add GENEVE option support for group 0 net/mlx5: add support for GENEVE VNI modify field net/mlx5: add support for modify GENEVE option header doc/guides/nics/mlx5.rst | 251 +++++- doc/guides/platform/mlx5.rst | 2 + doc/guides/rel_notes/release_24_03.rst | 9 + drivers/common/mlx5/mlx5_devx_cmds.c | 139 +++- drivers/common/mlx5/mlx5_devx_cmds.h | 29 +- drivers/common/mlx5/mlx5_prm.h | 20 +- drivers/common/mlx5/version.map | 1 + drivers/net/mlx5/hws/mlx5dr_definer.c | 277 ++++++- drivers/net/mlx5/hws/mlx5dr_definer.h | 49 +- drivers/net/mlx5/meson.build | 1 + drivers/net/mlx5/mlx5.c | 115 ++- drivers/net/mlx5/mlx5.h | 21 + drivers/net/mlx5/mlx5_flow.c | 30 + drivers/net/mlx5/mlx5_flow.h | 92 ++- drivers/net/mlx5/mlx5_flow_dv.c | 158 ++-- drivers/net/mlx5/mlx5_flow_geneve.c | 1011 ++++++++++++++++++++++++ drivers/net/mlx5/mlx5_flow_hw.c | 127 ++- drivers/net/mlx5/mlx5_testpmd.c | 556 ++++++++++++- drivers/net/mlx5/rte_pmd_mlx5.h | 102 +++ drivers/net/mlx5/version.map | 3 + 20 files changed, 2809 insertions(+), 184 deletions(-) create mode 100644 drivers/net/mlx5/mlx5_flow_geneve.c