[v5,0/9] add rte flow support for cpfl

Message ID	20230915100047.90153-1-yuying.zhang@intel.com (mailing list archive)
Headers	From: "Zhang, Yuying" <yuying.zhang@intel.com> To: yuying.zhang@intel.com, dev@dpdk.org, qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com Cc: mingxia.liu@intel.com Subject: [PATCH v5 0/9] add rte flow support for cpfl Date: Fri, 15 Sep 2023 10:00:38 +0000 Message-Id: <20230915100047.90153-1-yuying.zhang@intel.com> In-Reply-To: <20230906093407.3635038-1-wenjing.qiao@intel.com> References: <20230906093407.3635038-1-wenjing.qiao@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: dev-bounces@dpdk.org
Series	add rte flow support for cpfl \| [v5,0/9] add rte flow support for cpfl [v5,1/9] net/cpfl: add json parser for rte flow pattern rules [v5,2/9] net/cpfl: add mod rule parser support for rte flow [v5,3/9] net/cpfl: set up rte flow skeleton [v5,4/9] net/cpfl: add FXP low level implementation [v5,5/9] net/cpfl: add fxp rule module [v5,6/9] net/cpfl: add fxp flow engine [v5,7/9] net/cpfl: add flow support for representor [v5,8/9] app/test-pmd: refine encap content [v5,9/9] net/cpfl: fix incorrect status calculation

Message ID

20230915100047.90153-1-yuying.zhang@intel.com (mailing list archive)

Headers

From: "Zhang, Yuying" <yuying.zhang@intel.com>
To: yuying.zhang@intel.com, dev@dpdk.org, qi.z.zhang@intel.com,
 beilei.xing@intel.com, jingjing.wu@intel.com
Cc: mingxia.liu@intel.com
Subject: [PATCH v5 0/9] add rte flow support for cpfl
Date: Fri, 15 Sep 2023 10:00:38 +0000
Message-Id: <20230915100047.90153-1-yuying.zhang@intel.com>
In-Reply-To: <20230906093407.3635038-1-wenjing.qiao@intel.com>
References: <20230906093407.3635038-1-wenjing.qiao@intel.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: list
Errors-To: dev-bounces@dpdk.org

Series

add rte flow support for cpfl |

Message

Zhang, Yuying Sept. 15, 2023, 10 a.m. UTC

  From: Yuying Zhang <yuying.zhang@intel.com>

This patchset add rte flow support for cpfl driver.
It depends on the following patch set:
http://patchwork.dpdk.org/project/dpdk/cover/20230912173039.1612287-1-beilei.xing@intel.com/

Wenjing Qiao (2):
  net/cpfl: add json parser for rte flow pattern rules
  net/cpfl: add mod rule parser support for rte flow

Yuying Zhang (7):
  net/cpfl: set up rte flow skeleton
  net/cpfl: add FXP low level implementation
  net/cpfl: add fxp rule module
  net/cpfl: add fxp flow engine
  net/cpfl: add flow support for representor
  app/test-pmd: refine encap content
  net/cpfl: fix incorrect status calculation

 app/test-pmd/cmdline_flow.c             |   12 +-
 doc/guides/nics/cpfl.rst                |   43 +
 doc/guides/rel_notes/release_23_11.rst  |    1 +
 drivers/net/cpfl/cpfl_actions.h         |  858 +++++++++++
 drivers/net/cpfl/cpfl_controlq.c        |  803 ++++++++++
 drivers/net/cpfl/cpfl_controlq.h        |   75 +
 drivers/net/cpfl/cpfl_ethdev.c          |  394 ++++-
 drivers/net/cpfl/cpfl_ethdev.h          |  128 ++
 drivers/net/cpfl/cpfl_flow.c            |  339 +++++
 drivers/net/cpfl/cpfl_flow.h            |   85 ++
 drivers/net/cpfl/cpfl_flow_engine_fxp.c |  667 +++++++++
 drivers/net/cpfl/cpfl_flow_parser.c     | 1834 +++++++++++++++++++++++
 drivers/net/cpfl/cpfl_flow_parser.h     |  267 ++++
 drivers/net/cpfl/cpfl_fxp_rule.c        |  296 ++++
 drivers/net/cpfl/cpfl_fxp_rule.h        |   68 +
 drivers/net/cpfl/cpfl_representor.c     |   29 +
 drivers/net/cpfl/cpfl_rules.c           |  126 ++
 drivers/net/cpfl/cpfl_rules.h           |  306 ++++
 drivers/net/cpfl/cpfl_vchnl.c           |  144 ++
 drivers/net/cpfl/meson.build            |   18 +
 20 files changed, 6489 insertions(+), 4 deletions(-)
 create mode 100644 drivers/net/cpfl/cpfl_actions.h
 create mode 100644 drivers/net/cpfl/cpfl_controlq.c
 create mode 100644 drivers/net/cpfl/cpfl_controlq.h
 create mode 100644 drivers/net/cpfl/cpfl_flow.c
 create mode 100644 drivers/net/cpfl/cpfl_flow.h
 create mode 100644 drivers/net/cpfl/cpfl_flow_engine_fxp.c
 create mode 100644 drivers/net/cpfl/cpfl_flow_parser.c
 create mode 100644 drivers/net/cpfl/cpfl_flow_parser.h
 create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.c
 create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.h
 create mode 100644 drivers/net/cpfl/cpfl_rules.c
 create mode 100644 drivers/net/cpfl/cpfl_rules.h