From patchwork Tue Aug 15 16:50:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Yuying" X-Patchwork-Id: 140 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 583C2425A3; Fri, 15 Sep 2023 10:47:22 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 45D064029E; Fri, 15 Sep 2023 10:47:22 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id A8D9840295 for ; Fri, 15 Sep 2023 10:47:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1694767640; x=1726303640; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z9r9jcae+3ZirOgo5iEEcEOnnAw3w9FNBXpMf1/ms88=; b=QRSU15MSBoIbWTLdfdOGiwBS2N93ba4v7z+q1dhtHPH4YjufPXh79+d6 r1IKHa0AgvMs1I/byYvlVqiHzN3I74P6g14koQMOifnCLOJ79s5Y0aWcc 48vJOQHbBahC1Itrm9zy/iMzWEkdS7gHTEn7BF8CaoyH6pedQoRH6pzlz TwMugP/UFu8qYJSgLYgWm2aBWGVtEqyZrxidDBHAok6ytSFjjeAbqmPcH bnimV7lmEYKXT+I27EaqlZ876b/SqpSn+sIYo6G7MwLhW8dHVUI/HsI+0 IpNRvZ5B70cC2w4LF934Tr3EY1c9Dznf3MduGDbwao4FMEw4Iv2JPmixJ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10833"; a="443264989" X-IronPort-AV: E=Sophos;i="6.02,148,1688454000"; d="scan'208";a="443264989" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2023 01:47:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10833"; a="738254347" X-IronPort-AV: E=Sophos;i="6.02,148,1688454000"; d="scan'208";a="738254347" Received: from dpdk-pengyuan-mev.sh.intel.com ([10.67.119.128]) by orsmga007.jf.intel.com with ESMTP; 15 Sep 2023 01:47:17 -0700 From: "Zhang, Yuying" To: yuying.zhang@intel.com, dev@dpdk.org, qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com Cc: mingxia.liu@intel.com Subject: [PATCH v4 0/9] add rte flow support for cpfl Date: Tue, 15 Aug 2023 16:50:41 +0000 Message-Id: <20230815165050.86595-1-yuying.zhang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230906093407.3635038-1-wenjing.qiao@intel.com> References: <20230906093407.3635038-1-wenjing.qiao@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Yuying Zhang This patchset add rte flow support for cpfl driver. It depends on the following patch set: http://patchwork.dpdk.org/project/dpdk/cover/20230912173039.1612287-1-beilei.xing@intel.com/ Wenjing Qiao (2): net/cpfl: add json parser for rte flow pattern rules net/cpfl: add mod rule parser support for rte flow Yuying Zhang (7): net/cpfl: set up rte flow skeleton net/cpfl: add FXP low level implementation net/cpfl: add fxp rule module net/cpfl: add fxp flow engine net/cpfl: add flow support for representor app/test-pmd: refine encap content net/cpfl: fix incorrect status calculation app/test-pmd/cmdline_flow.c | 12 +- doc/guides/nics/cpfl.rst | 43 + doc/guides/rel_notes/release_23_11.rst | 1 + drivers/net/cpfl/cpfl_actions.h | 858 +++++++++++ drivers/net/cpfl/cpfl_controlq.c | 803 ++++++++++ drivers/net/cpfl/cpfl_controlq.h | 75 + drivers/net/cpfl/cpfl_ethdev.c | 394 ++++- drivers/net/cpfl/cpfl_ethdev.h | 128 ++ drivers/net/cpfl/cpfl_flow.c | 339 +++++ drivers/net/cpfl/cpfl_flow.h | 85 ++ drivers/net/cpfl/cpfl_flow_engine_fxp.c | 667 +++++++++ drivers/net/cpfl/cpfl_flow_parser.c | 1834 +++++++++++++++++++++++ drivers/net/cpfl/cpfl_flow_parser.h | 267 ++++ drivers/net/cpfl/cpfl_fxp_rule.c | 296 ++++ drivers/net/cpfl/cpfl_fxp_rule.h | 68 + drivers/net/cpfl/cpfl_representor.c | 29 + drivers/net/cpfl/cpfl_rules.c | 126 ++ drivers/net/cpfl/cpfl_rules.h | 306 ++++ drivers/net/cpfl/cpfl_vchnl.c | 144 ++ drivers/net/cpfl/meson.build | 18 + 20 files changed, 6489 insertions(+), 4 deletions(-) create mode 100644 drivers/net/cpfl/cpfl_actions.h create mode 100644 drivers/net/cpfl/cpfl_controlq.c create mode 100644 drivers/net/cpfl/cpfl_controlq.h create mode 100644 drivers/net/cpfl/cpfl_flow.c create mode 100644 drivers/net/cpfl/cpfl_flow.h create mode 100644 drivers/net/cpfl/cpfl_flow_engine_fxp.c create mode 100644 drivers/net/cpfl/cpfl_flow_parser.c create mode 100644 drivers/net/cpfl/cpfl_flow_parser.h create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.c create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.h create mode 100644 drivers/net/cpfl/cpfl_rules.c create mode 100644 drivers/net/cpfl/cpfl_rules.h