From patchwork Fri Oct 21 05:20:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hernan Vargas X-Patchwork-Id: 118838 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 65493A0552; Thu, 20 Oct 2022 23:24:37 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id ED1C3410FC; Thu, 20 Oct 2022 23:24:36 +0200 (CEST) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 36B5240FAE for ; Thu, 20 Oct 2022 23:24:34 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666301075; x=1697837075; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=2HZg3SerXElgdnP/1ko2XGXtaTNltzOe9/R9Cb/MCTU=; b=KRr6KIQUzsdEDa/OibYpcalGbUAkDTwwoNIa3uv1EJKnwFrBcBP7FxAi MVUDiAillJwTjpIcQ7z9bAaJbrIRi26VJTfeph8VvLrDYfu3ITJ4ecOu3 1OvtXjmcfbawdSw0yLK4iBfSBjJ/0Wr72Yvw4eV6bBc5A0ryibMjeEcYm jYRsxJlVrK8vG35LMiZqC54zGdjsVwQmtuZEuF00w0009Aglf/N/OBbmL 8t40+s1jVJn//qwob0H0NgXWxCZ58oUiy02G+Q8TwLcbFxNRTKlNa73Sr gspm9peE3Ivzepam9H+ngM0ca2wBScOZQ9b3AanakIhF3UtY/L+mE+qiQ g==; X-IronPort-AV: E=McAfee;i="6500,9779,10506"; a="368887449" X-IronPort-AV: E=Sophos;i="5.95,199,1661842800"; d="scan'208";a="368887449" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2022 14:24:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10506"; a="755396788" X-IronPort-AV: E=Sophos;i="5.95,199,1661842800"; d="scan'208";a="755396788" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orsmga004.jf.intel.com with ESMTP; 20 Oct 2022 14:24:28 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v5 00/29] baseband/acc100: changes for 22.11 Date: Thu, 20 Oct 2022 22:20:33 -0700 Message-Id: <20221021052102.107141-1-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org v5: Fix compilation error and squash documentation changes. v4: Rebased code to use the latest ACC common API and implemented review comment changes. v3: Code refactor based on comments and grouping fixes at beginning of series. v2: Rebased code to use ACC common API. v1: Upstreaming ACC100 changes for 22.11. This patch series is dependant on series: https://patches.dpdk.org/project/dpdk/list/?series=25191 Hernan Vargas (29): baseband/acc100: fix ring availability calculation baseband/acc100: add function to check AQ availability baseband/acc100: memory leak fix baseband/acc100: add LDPC encoder padding function baseband/acc100: check turbo dec/enc input baseband/acc100: check for unlikely operation vals baseband/acc100: enforce additional check on FCW baseband/acc100: allocate ring/queue mem when NULL baseband/acc100: reduce input length for CRC24B baseband/acc100: fix clearing PF IR outside handler baseband/acc100: set device min alignment to 1 baseband/acc100: add protection for NULL HARQ input baseband/acc100: reset pointer after rte_free baseband/acc100: fix debug print for LDPC FCW baseband/acc100: add enqueue status baseband/acc100: add scatter-gather support baseband/acc100: add HARQ index helper function baseband/acc100: enable input validation by default baseband/acc100: added LDPC transport block support baseband/acc100: update validate LDPC enc/dec baseband/acc100: implement configurable queue depth baseband/acc100: add queue stop operation baseband/acc100: update uplink CB input length baseband/acc100: update log messages baseband/acc100: store FCW from first CB descriptor baseband/acc100: update device info baseband/acc100: add ring companion address baseband/acc100: add workaround for deRM corner cases baseband/acc100: configure PMON control registers doc/guides/bbdevs/acc100.rst | 9 + drivers/baseband/acc/acc100_pmd.h | 5 + drivers/baseband/acc/acc_common.h | 10 + drivers/baseband/acc/meson.build | 21 + drivers/baseband/acc/rte_acc100_pmd.c | 1217 ++++++++++++++++++++----- 5 files changed, 1033 insertions(+), 229 deletions(-)