From patchwork Wed Oct 19 00:38:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hernan Vargas X-Patchwork-Id: 118435 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 78F5DA0560; Tue, 18 Oct 2022 18:42:49 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0E55540A8B; Tue, 18 Oct 2022 18:42:49 +0200 (CEST) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 384E040395 for ; Tue, 18 Oct 2022 18:42:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666111367; x=1697647367; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=4XDekgY/dlkGiQX9PJj/OjC+Ms5KXp9T4aJ5BSCuL3w=; b=Ufs7WzW4r8QaB5dX/tg4RSogCYajwuRxxqwb2LUgNkFzjDdjZOYw3krb wvHdcjQFnMOxfVVNKdK1ucFLqSK+KNkaSwDwI6XT853QNFIP4iAa3KJmR PQ0Yth7aKB2Cgsww8iyTqM0g2RhwmsTCrg20n7QAc6jVZL0x+mzOpxGIn MtMrl7Y0Dq4nTs/xn2kbjwJVneCSkQVIgNtmLSxnDmEJ+tKrpxJSCX94U LwsvpHjtve4eASE5yTjpArQHO/E2q2vx3pilraTenNY551BOfyFzWSH9u a0keanuw+fMDkQ7xIEvZtfw/kicwi5awLjQUcN8IsUbIIho1JZTQ2Rf2Z g==; X-IronPort-AV: E=McAfee;i="6500,9779,10504"; a="368192015" X-IronPort-AV: E=Sophos;i="5.95,193,1661842800"; d="scan'208";a="368192015" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2022 09:42:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10504"; a="803835973" X-IronPort-AV: E=Sophos;i="5.95,193,1661842800"; d="scan'208";a="803835973" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orsmga005.jf.intel.com with ESMTP; 18 Oct 2022 09:42:45 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v4 00/30] baseband/acc100: changes for 22.11 Date: Tue, 18 Oct 2022 17:38:48 -0700 Message-Id: <20221019003918.257506-1-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org v4: Rebased code to use the latest ACC common API and implemented review comment changes. v3: Code refactor based on comments and grouping fixes at beginning of series. v2: Rebased code to use ACC common API. v1: Upstreaming ACC100 changes for 22.11. This patch series is dependant on series: https://patches.dpdk.org/project/dpdk/list/?series=25191 Hernan Vargas (30): baseband/acc100: fix ring availability calculation baseband/acc100: add function to check AQ availability baseband/acc100: memory leak fix baseband/acc100: add LDPC encoder padding function baseband/acc100: check turbo dec/enc input baseband/acc100: check for unlikely operation vals baseband/acc100: enforce additional check on FCW baseband/acc100: allocate ring/queue mem when NULL baseband/acc100: reduce input length for CRC24B baseband/acc100: fix clearing PF IR outside handler baseband/acc100: set device min alignment to 1 baseband/acc100: add protection for NULL HARQ input baseband/acc100: reset pointer after rte_free baseband/acc100: fix debug print for LDPC FCW baseband/acc100: add enqueue status baseband/acc100: add scatter-gather support baseband/acc100: add HARQ index helper function baseband/acc100: enable input validation by default baseband/acc100: added LDPC transport block support baseband/acc100: update validate LDPC enc/dec baseband/acc100: implement configurable queue depth baseband/acc100: add queue stop operation baseband/acc100: update uplink CB input length baseband/acc100: update log messages baseband/acc100: store FCW from first CB descriptor baseband/acc100: update device info baseband/acc100: add ring companion address baseband/acc100: add workaround for deRM corner cases baseband/acc100: configure PMON control registers baseband/acc100: update guide docs doc/guides/bbdevs/acc100.rst | 9 + drivers/baseband/acc/acc100_pmd.h | 5 + drivers/baseband/acc/acc_common.h | 10 + drivers/baseband/acc/meson.build | 21 + drivers/baseband/acc/rte_acc100_pmd.c | 1216 ++++++++++++++++++++----- 5 files changed, 1032 insertions(+), 229 deletions(-)