From patchwork Tue Mar 24 11:49:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Laatz X-Patchwork-Id: 67045 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 193D3A057B; Tue, 24 Mar 2020 12:49:29 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4F2E11C0C9; Tue, 24 Mar 2020 12:49:28 +0100 (CET) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id AFDE61C0C4 for ; Tue, 24 Mar 2020 12:49:26 +0100 (CET) IronPort-SDR: O/EXvJdbZlFIxwYuSdQnno5dxuEDsp0LD7HO4OJrvX9qdMv7YXg20902yPWcIjXfKW9Jjbf0SZ 7h5VuEg9pUkw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2020 04:49:25 -0700 IronPort-SDR: OhpjoYJiDVq0Af5ZK2U4FM9D880HsklWaFmYrLKrAcaDQKgRmH3B+HBKyggvRqx9D7lmvw/rAp 4G+dJKuxiY2Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,300,1580803200"; d="scan'208";a="270356280" Received: from silpixa00399838.ir.intel.com (HELO silpixa00399838.ger.corp.intel.com) ([10.237.222.98]) by fmsmga004.fm.intel.com with ESMTP; 24 Mar 2020 04:49:24 -0700 From: Kevin Laatz To: dev@dpdk.org Cc: bruce.richardson@intel.com, harry.van.haaren@intel.com, Kevin Laatz Date: Tue, 24 Mar 2020 11:49:04 +0000 Message-Id: <20200324114921.7184-1-kevin.laatz@intel.com> X-Mailer: git-send-email 2.17.1 Subject: [dpdk-dev] [PATCH 00/17] Add CPU flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch set adds CPU flags which will enable the detection of ISA features available on more recent x86 based CPUs. The CPUID leaf information can be found in Section 1.7 of this document: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf Kevin Laatz (17): eal/cpuflags: add avx512 doubleword and quadword eal/cpuflags: add avx512 integer fused multiply-add eal/cpuflags: add avx512 conflict detection eal/cpuflags: add avx512 byte and word eal/cpuflags: add avx512 vector length eal/cpuflags: add avx512 vector bit manipulation eal/cpuflags: add avx512 vector bit manipulation 2 eal/cpuflags: add galois field new instructions eal/cpuflags: add vector AES eal/cpuflags: add vector carry-less multiply eal/cpuflags: add avx512 vector neural network instructions eal/cpuflags: add avx512 bit algorithms eal/cpuflags: add avx512 vector popcount eal/cpuflags: add cache line demote eal/cpuflags: add direct store instructions eal/cpuflags: add direct store instructions 64B eal/cpuflags: add avx512 two register intersection lib/librte_eal/common/arch/x86/rte_cpuflags.c | 18 ++++++++++++++++++ .../common/include/arch/x86/rte_cpuflags.h | 18 ++++++++++++++++++ 2 files changed, 36 insertions(+)